Reconfigurable Network Elements to Entity Title Architecture

Current web applications are built with distinct networking and computing requirements. You can think in a video streaming connection that is sensitive to the network thoughput over the same infrastructure in where an e-commerce service demands high availability and security.

By looking a little bit more into the network we see that the applications are built over a combination of networking and computing equipment formed from General Purpose Processors and ASICs. Switches and routers, for example, are combined to support and underly a layered hierarchy of protocolos running in GPP and network processors to provide services.

The lack of built in caracteristics such as security, availability, mobility and performance reliability became a big issue to the Internet. Now, it requires an overall redesign of the whole architecture, bringing a Future Internet (FI) that already take all the issues into consideration and is evolvable and flexible to accommodate future changes.

When the Software Defined Networks came into business to address the FI perspectives they imported from the Telecommunications the idea of Control and Data planes. Since then (and automaticaly) the Control plane went to the software and the Data plane to the hardware. Also, the network programability of SDN relies on the Control plane, eliminating from the Data plane (and hardware) any complexity not related to the forwarding.

In this sense, our reserch group proposed the Entity Title Architecture (ETArch), an SDN branch where the Entities talk to each other over logical links named Workspaces.

Motivation


We kept us thinking on "why not to add some capabilities to the hardware and make it more flexible by itself?" and "what kind of requirements could be provided by the hardware without hard chargings to the Data plane?"

By this time, the Reconfigurable Computing brought some perspective in this sense. Specially adopting the FPGA, it is worth promising to migrate - partially - the Security and Availability requirements to the Data plane in such a way that the underlying hardware of a network element became itself reconfigurable and fast enough to provide the programability needed by the applications using the network.

This research mix the Future Internet with the Reconfigurable Computing and focuses on the hardware underlying the data plane and how it can cooperate with the software to provide a flexible and fast solution infrastructure to the ETArch network.


Goals


This project aims to demonstrate by experimentation that FPGA combined with microprocessors enables the creation and maintenance of secure and highly available ETArch Workspaces with no penalty to the network performance. We intend to build a reconfigurable switch able to provide mechanisms of security and availability to the ETArch communications. By doing this, we can demonstrate the possibility of increasing the Data plan functionality with some parallel processing without charging the hardware and giving more scalability to the control agents.