Email: minho1.ha@sk.com
Office: 9, Seongnam-daero 343beon-gil, Bundang-gu, Seongnam-si, Gyeonggi-do, Republic of Korea
Google Scholar: https://scholar.google.co.kr/citations?user=-O1Xm80AAAAJ&hl=ko
Dissertation: Solutions for Hardware-Efficient Convolutional Neural Network Inference [slides] [paper]
Advisor: Sunggu Lee
Thesis: Approximate Arithmetic Unit Designs for Error-Resilient Applications [slides]
Advisor: Sunggu Lee
DeepSpeed
PyTorch
TensorFlow
C
Python
others (C++, Java, Ruby)
gem5
CACTI
Verilog HDL
VHDL
Xcelium Logic Simulator
Xilinx Vivado
Intel Quartus
Xilinx Vitis
MATLAB
(* means who is corresponding author)
[J7] Minho Ha*, Euiseok Kim, and Hoshik Kim, "H3: Hybrid Architecture using High Bandwidth Memory and High Bandwidth Flash for Cost-Efficient LLM Inference," IEEE Computer Architecture Letters, vol. 25, no. 1, pp. 49-52, Jan-June. 2026.
[J6] Hyeyoon Cho, Hyojun Son, Junmin Choi, Byungil Koh, Minho Ha, and John Kim*, "Proactive Embedding on Cold Data for Deep Learning Recommendation Model Training," IEEE Computer Architecture Letters, vol. 23, no. 2, pp. 203-206, July-Dec. 2024.
[J5] Minho Ha, Junhee Ryu, Jungmin Choi, Kwangjin Ko, Sunwoong Kim, Sungwoo Hyun, Donguk Moon, Byungil Koh, Hokyoon Lee, Myoungse Kim, Hoshik Kim, and Kyoung Park*, "Dynamic Capacity Service for Improving CXL Pooled Memory Efficiency," IEEE Micro, vol. 42, no. 2, pp. 39-47, 2023.
[J4] Minho Ha, Younghoon Byun, Seungsik Moon, Youngjoo Lee, and Sunggu Lee*, "Layerwise Buffer Voltage Scaling for Energy-Efficient Convolutional Neural Network," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 40, no. 3, pp. 1-10, 2021.
[J3] Minho Ha, Younghoon Byun, Jeonghun Kim, Jaecheol Lee, Youngjoo Lee, and Sunggu Lee*, "Selective Deep Convolutional Neural Network for Low Cost Distorted Image Classification," IEEE Access, vol. 7, pp. 133030-133042, 2019.
[J2] Minho Ha and Sunggu Lee*, “Multipliers with Approximate 4-2 Compressors and Error Recovery Modules,” IEEE Embedded Systems Letters, vol. 10, no. 1, pp. 6-9, Mar. 2018.
[J1] Minho Ha and Sunggu Lee*, “Accurate Hardware-Efficient Logarithm Circuit,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 8, pp. 967-971 , Aug. 2017.
[C6] Jongho Park, Hoyeon Lee, Seohyun Kim, Minho Ha, Byungil Koh, Jungmin Choi and Yeseong Kim*, "CXL Pooled Memory System for AI Acceleration Based on Long-term Embedding Usage Prediction," Design, Automation and Test in Europe (DATE), Apr. 2026.
[C5] Sanghoon Lee, Jongho Park, Minho Ha, Byungil Koh, Kyoung Park, and Yeseong Kim*, “Sidekick: Near Data Processing for Clustering Enhanced by Automatic Memory Disaggregation,” Design Automation Conference (DAC), San Francisco, Jul. 2023.
[C4] Jongho Park, Hyukjun Kwon, Seowoo Kim, Junyoung Lee, Minho Ha, Euicheol Lim, Mohsen Imani, and Yeseong Kim*, "QuiltNet: Efficient Deep Learning Inference on Multi-Chip Accelerators Using Model Partitioning," Design Automation Conference (DAC), San Francisco, Jul. 2022.
[C3] Minho Ha, Joonseop Sim, Donguk Moon, Myunghyun Rhee, Jungmin Choi, Byungil Koh, Euicheol Lim, and Kyoung Park*, "CMS: A Computational Memory Solution for High-Performance and Power-Efficient Recommendation System," IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) Industrial Session, Incheon, Jun. 2022.
[C2] Minho Ha, Seokha Hwang, Jeonghun Kim, Youngjoo Lee, and Sunggu Lee*, "Hierarchical Approximate Memory for Deep Neural Network Applications," Asilomar Conference on Signals, Systems, and Computers (ACSSC), Nov. 2020.
[C1] Younghoon Byun, Minho Ha, Jeonghun Kim, Sunggu Lee, and Youngjoo Lee*, "Low-Complexity Dynamic Channel Scaling of Noise-Resilient CNN for Intelligent Edge Devices," Design, Automation and Test in Europe (DATE), Mar. 2019.
[M8] Minho Ha, “Memory-Centric Computing Systems,” Introduction to Semiconductor Industrial Ecosystem, POSTECH GSST, Sep. 2025.
[M7] Minho Ha, “Dynamic Capacity Service for Improving CXL Pooled Memory Efficiency,” Workshop on Memory-Centric Computing Technologies and Industry Trends (in Conjunction with Korea Computer Congress 2023), Jun. 2023.
[M6] Minho Ha, “Dynamic Capacity Service for Improving CXL Pooled Memory Efficiency,” SK hynix Future Technology Symposium, Apr. 2023.
[M5] Minho Ha, Joonseop Sim, Jungmin Choi, Donguk Moon, Myunghyun Rhee, Taeyoung Ahn, Byungil Koh, Euicheol Lim and Kyoung Park, "Accelerating Data Analytics near Memory: A k-NN Search Case Study," Design Automation Conference (DAC) Work-in-Progress Session, San Francisco, Jul. 2022.
[M4] Minho Ha, Joonseop Sim, Jungmin Choi, Donguk Moon, Myunghyun Rhee, Taeyoung Ahn, Byungil Koh, Euicheol Lim and Kyoung Park, "Accelerating Data Analytics near Memory: A k-NN Search Case Study," International Workshop on Domain Specific System Architecture (DoSSA), Virtual Conference, Apr. 2022.
[M3] Minho Ha, “Computational Memory Solution,” SK ICT Tech Summit 2021, Nov. 3, 2021.
[M2] Minho Ha and Sunggu Lee, "DMC: Differentiable Model Compression for Hardware-Efficient Convolutional Neural Network," Design Automation Conference (DAC) Work-in-Progress Session, Virtual Conference, Jul. 2020.
[M1] Minho Ha, Younghoon Byun, Youngjoo Lee, and Sunggu Lee, "Dynamic Buffer Voltage Scaling for Energy-Efficient Convolutional Neural Network," Design Automation Conference (DAC) Work-in-Progress Session, Las Vegas, Jun. 2019.
[P12] Minho Ha, "Large Language Model Processing System with Key-Value Cache Migration," Application Number: 19/549,454.
[P11] Jungmin Choi, Hanyee Kim, Minho Ha, Byungil Koh, "Electronic Device Comprising Plurality of Computing Nodes and a Method of Operating One of the Plurality of Computing Nodes," Application Number: 19/379,761.
[P10] Minho Ha, "Switching Controller, Storage Device and Computing System for Improving Difference of Access Latency between Memories," Application Number: 19/201,953.
[P9] Minho Ha, "Computing System Including Storage Device and Operating Method Thereof," Application Number: US19/300,438
[P8] Jongho Park, Hoyeon Lee, Yeseong Kim, Minho Ha, Byungil Koh, "Neural Network System Embedding Operation," Application Number: US19/308,032.
[P7] Jongho Park, Hoyeon Lee, Yeseong Kim, Minho Ha, Byungil Koh, "Neural Network System Performing Parallel Neural Network Operation," Application Number: US19/248,179.
[P6] Sanghoon Lee, Jongho Park, Yeseong Kim, Minho Ha, Byungil Koh, Jungmin Choi, "Data Processing System Including Remote Processing Devcie, and Operation Method Thereof," Application Number: US18/420,542.
[P5] Haeyoon Cho, Hyojun Son, John Dongjun Kim, Jungmin Choi, Byungil Koh, Minho Ha, "Neural Network Accelerator with Improved Learning Performance and Operation Method Thereof," Application Number: US18/520,276.
[P4] Jungmin Choi, Sunwoong Kim, Byungil Koh, Minho Ha, "Apparatus and Method for Sanitizing a Shared Memory Device or A Memory Expander," Registration Number: US12287968.
[P3] Minho Ha, "Switching Controller, Storage Device and Computing System for Improving Difference of Access Latency between Memories," Registration Number: US12326815.
[P2] Yeseong Kim, Jongho Park, Hyukjun Kwon, Seowoo Kim, Minho Ha, Euicheol Lim,"Device for partitioning a neural network and operation method thereof," Application Number: US18/048,356.
[P1] Youngjoo Lee, Sunggu Lee, Minho Ha, Younghoon Byun, “Neural processing device and operation method thereof,” Registration Number: US11748612.
[D2] 하민호, 이영주, 이승구, “고효율 디지털 신호처리를 위한 근사 곱셈기 설계,” The Magazine of the IEIE, vol. 44, no. 6, pp. 24-31, Jun. 2017.
[D1] 이승구, 하민호, “Logarithmic Number System (LNS) 기반 연산의 정확도 향상 연구,” IDEC Newsletter, vol. 222, Dec. 2015.
Learning about Electrical Engineering Using Matlab [EECE236], POSTECH, Spring 2019.
Computational Intelligence [EECE651], POSTECH, Fall 2018.
Computational Intelligence [EECE651], POSTECH, Fall 2017.
Computational Intelligence [EECE651], POSTECH, Fall 2016.
Introduction to Computer Security [EECE472-01], POSTECH, Fall 2015.
Zebu용 Generic PCIe Host AP 구현, Samsung Foundry, 2019.05.-2019.06.
초저전력 지능형 모바일 시스템을 위한 자율 정확도 스케일링, Samsung Research Funding & Incubation Center, 2017.09.-2020.08.
고속 제품 증가 대응을 위한 검사 기법, Samsung Electronics Test & Package Center, 2016.03.-2018.06.
Advanced Technology Pathfinding for Future Memory and Storage System, 2025.01.-present
CXL-based Hybrid (DRAM + NAND) Memory System
Future GPU-based Training and Inference System
Future HBM and HBF Architecture Exploration
Memory System Architecture Exploration for AI Training and Inference, 2024.01.-2024.12.
CXL Pooled Memory Architecture Exploration, 2021.11.-2023.12.
Discovering Value-Added Feature of CXL Pooled Memory
CXL Pooled Memory Device Firmware Design & Verification
Hardware Architecture Modeling for Recommendation System & Data Analytics, 2020.08.-2021.11.
Circuits, Systems, and Signal Processing
2023
IEEE Micro
2022
IEEE Transactions on Emerging Topics in Computing
2020
International Journal of Circuit Theory and Applications
2020
AEÜ - International Journal of Electronics and Communications
2019
International Symposium on Circuits and Systems
2019~2021
IEEE Transactions on Circuits and Systems I: Regular Papers
2019~2020, 2023~2024
IEEE Transactions on Circuits and Systems II: Express Briefs
2017~2024