DynaRapid

While software code compilation may take just a few seconds, FPGA compilation times can often span from several minutes to hours due to the complexity of the underlying toolchain and the ever-growing device capacity.

DynaRapid is a very fast compilation methodology that generates in a matter of seconds placed-and-routed kernel designs for AMD FPGAs, accelerating the C-to-FPGA implementation process by up to 33x with only 0.9x of degradation in Fmax compared to a conventional flow.

Fig. 1: DynaRapid Flow Overview. The library generation is performed offline. The Circuit generation is performed online, with a runtime of tens of seconds. The final output of DynaRapid is a fully placed-and-routed design checkpoint for AMD-Xilinx FPGAs in a matter of seconds.

A fully placed and routed design in less than 12 seconds, check it out!