MOSFET Basics and Scaling, STTP, Terna Engineering College, July 2007Nerul, Navi Mumbai.
VLSI Design using WinSPICE, Nov 2008, STTP, Don Bosco Institute of Technology, Kurla, Mumbai.
Electronic Circuit Simulation using SPICE, STTP, KC College of Engineering, Thane, Jan 2009.
Modern Electronic Design Techniques using WinSpice, Feb 2009, RGIT, Mumbai.
Analog Circuit Design, STTP Saraswati Engineering College, Kharghar, Navi Mumbai, July 2009.
Optimization of Transistor Performance for VLSI Applications, Tasgaokar College of Engineering, Karjat, Thane, April 2010.
Integrated Circuit Design using WinSPICE, Pooranmal Lahoti Government Polytechique College, Latur, 23rd Jan 2011.
How to write a Technical Paper, Don Bosco Institute of Technology, DBIT-IEEE Chapter, September 2011.
Role of Electronics & Telecommunication Engineers in 21st Century, Yadavrao Tasgonakar College of Engineering and Technology, Bhivpuri, Karjat. October 2011
Low Power VLSI Design, STTP, Lokmanya Tilak College of Engineering, Kopar Khairne, Navi Mumbai, 11th January 2012.
Variability Aware Performance Evaluation of Nanoscale CMOS Devices and Circuits, 10 March 2012, Technical Talk Delivered to DBIT faculty members as part of Staff Development Programme.
Past, Present, and Future of VLSI, Yadvarao Tasgaonkar Institute of Technology, Bhivpuri Road, Karjat, Thane, on 10 April 2012.
Optimization of Signal Processing Algorithms for Efficient Implementation of VLSI Architectures, STTP on Advances in Signal Processing, KIT, Kholapur, 4 January 2013.
Journeying from Electronics to Nanoelectronics, K. J. Somaiya Institute of Information Technology, Sion, Mumbai, 7 February 2013.
Advanced Low Power VLSI Design at Fr. Angel College of Engineering, Vashi, Navi Mumbai, July 2013.
In Search of research, Don Bosco Institute of Technology, Faculty Development Programme, January 10, 2014
CMOS Analog VLSI Design, Sandipani Institute of Technology, Nashik, February 2014.
How Write Project Report, K K Wagh College of Engineering, Nashik, May 2014.
Variability Aware Low Power Design of Nanoscale CMOS circuits, Saradar Patel Institute of Technology, Andheri(W), Mumbai, May 7, 2015.
Design of nanoscale Analog and Mixed Signal VLSI Design, Gujarat Technological University, Research Symposium, April 2015
VLSI Design: Road Map to Explore IoT and Multidimensional Opportunities, K.C. College of Engineering on September 22, 2015.
Design of MOS Differential Amplifier and Two stage Operation Amplifier, Sardar Pater Institute of Technology on December 9, 2015.
Statistical Techniques for the performance evaluation of Nanoscale COS devices and Circuits, Gujrat Technical University on April 12, 2016.
Nanoscale Low Power VLSI Design, Shah &Anchor College of Engineering, Chembur, Mumbai on July 1, 2016.
Low Power VLSI Design, MIT College of Engineering, Kothrud, Pune on July 4, 2016.
Electronics:Past, Present and Future, IEEE-WIE Outreach programme, DBIT on August 3, 2016.
Nanoscale Low Power Design using Design of Experiment Technique, Harne College of Engineering, B.R. Harne College of Engineering, Badlapur, on August 6, 2016.
Workshop of Next Generation Simulation Programme with Integrated Circuit Empasis (Ngspice), KC College of Engineering, Thane on December 19-20, 2016.
Low Power CMOS VLSI Design Technique, at the Universal College of Engineering, Vasai on March 7, 2018.
Career Opportunities in VLSI Design, at Vidyalankar Institute Technology, Mumbai on March 8, 2018.
VLSI Design - Past, Present and Future, at D. J. Sanghvi College of Engineering, Mumbai on March 23, 2018.
Advancement and Career Opportunities in Analog and Mixed Signal VLSI Design, at K.C. College of Engineering, Mumbai on April 02, 2018.
Bloom’s Taxonomy: Tool for Making Efficient Engineers, on December 20, 2018 at Don Bosco Institute of Technology, Mumbai.
The Rise of India’s Semiconductor Industry” during FDP on Fusion of Semiconductor Advancements and AI paradigms, Sevari College of Engineering, Pandarpur on December 23, 2024.
VLSI: Powering future of Emerging Technologies” on October 24, 2024 , IETE Chapter, SFIT, Borivali, Mumbai
Neuromorphic Computing and VLSI Implementation” at St. John College of Engineering, Palghar on January 20, 2025.
FPGA Based Blockchain System for Supply Chain Management” during ATAL FDP on Integration of Blockchain and Artificial Intelligence for Enhanced Supply Chain Management at Don Bosco Institute of Technology, Mumbai on January 10, 2025
Machine Learning for Analog and Mixed Signal VLSI ” at Fr. Agnel College Engineering, Vashi, Navi Mumbai on December 11, 2024 .
Strategic Implementation of Autonomy in NEP 2020 Era” during Faculty Development Programme at DBIT, Mumbai on April 17, 2025.