Lab 1

• Observed mapping of the pins to the switches for the hexadecimal counter

• When using file LEDDEC:

  • Switches 0-7 on the Nexys A7 are in control here

  • Switches 0-4 represent binary values that can count up to F in hexadecimal

  • Switches 6, and 7 are in control of changing the position of the digit on the left-hand 4-digit display

  • No apparent use of switch 5?

• When using file Lab1B:

  • The digit display on the FPGA will count up in hex, with only the left-most digit, and the right four digits having a display.

• Result: Lab 1

Lab 2

• Multiplex uses more than one digit for the inputs and leaves one digit output

  • It will take in the largest (most significant) value of the multiple-digit input and that will determine the output (single digit)

• This lab will program the right 4-digit display to count up to FFFF in hex, at the maximum clock rate of the Nexys A7 50T, 100 MHz.

  • Once this is complete, the left-hand digit will increase by 1, once this digit reaches F, the one to its right will count up.

  • This process is repeated until the entire left hand display will read “FFFF” and then it will restart

• I also embedded this program into my FPGA in order to allow it to run automatically when the board receives a power input.

• Result: Lab 2

Lab 3

• When the display-maker is on ball territory (determined by x and y value), only red variations can show on the VGA display

• When not on ball, any color can be shown

• Ball size is initially 8

• VGA Displays color left to right, then top to bottom

• Result (pt 1): Lab 3.1

• I changed the ball color to blue, size to 25, and from a square to a ball

• Also allowed the newly formed ball to move freely in all directions, negating its directional magnitude when encountering a wall.

• Code for ball modification was provided by my friend Edward (EJ) Hannah

• Reminds me of the DVD logo, bouncing around the screen while DVD-player is idling

• Result (pt 2): Lab 3.2

Lab 4

• This is a calculator with hexadecimal digits

• Trouble: Digits initially input from left to right, 1-->2 would become 21 instead of 12, changed the last lines of **FILE** and negated the 2 digit binary input

• Upper button on board is “+” left button is “=” and the center is the “clear” button

• Result: Lab 4

Lab 5

• This lab requires no changes to be made

• I used the I2S2 part to connect to port JA.

• I then plugged my headphones into the 3.5mm output jack

  • The siren produces a sound that goes up and down in frequency

  • It sounds like a “Groan Tube” from when I was a child

• Result: Lab 5

Lab 6

• My friend, Edward (EJ) Hannah suggested that I change the following:

• Chage 11 DOWNTO 0 to 7 DOWNTO 0

  • 12 bit to 8 bit

• Change 10 DOWNTO 0 to 6 DOWNTO 0

  • 11 bit to 7 bit

• These changes were mainly in “adc_if.vhd” & the top, “pong.vhd”

• These changes did not allow the program to run as intended

  • I reverted all changed code back to its original form

• VGA display successfully displayed a cyan-colored pong paddle

• Pressing BTNC started the ball’s random movement

• Trouble: I was unable to move the cyan paddle to defend against the ball passing what is presumed to be player 1’s goalpost.

  • In the process of attempting to connect a 10K Ohm Potentiometer to the board (using wires, no breadboard) via the JA port in order to control my paddle, I produced a cloud of smoke that was emitted from the Potentiometer. Do not attempt!

• Result: Lab 6

1. 09/01/20: The Syllabus

   1. Professor Kevin Lu went over the syllabus, course materials, goals, and expectations for the course.

   2. Created my Google Site

2. 09/03/20: Read Chapters 1-2

3. 09/08/20: Read Chapter 3

   1. Downloaded GHDL, GTKWave

4. 09/10/20: Read Chapter 4

5. 09/15/20: Read Chapter 5

6. 09/17/20: Read Chapters 6-7

7. 09/22/20: Read Chapter 8 *pt 1

8. 09/24/20: Read Chapter 8 *pt 2

9. 09/29/20: Read Chapter 9

10. 10/01/20: Read Chapter 10

11. 10/06/20: Review Chapters 11-13

12. 10/08/20:

    1. Downloaded Vivado

    2. Ordered Nexys-A7 50T

13. 10/13/20: NO CLASS

    1. Monday Schedule

14. 10/15/20:

    1. Professor Lu Explained Lab 1

15. 10/20/20:

    1. Professor Lu Explained Lab 2

16. 10/22/20:

    1. Professor Lu Explained Lab 3

17. 10/27/20:

    1. Professor Lu Explained Labs 4, 5, and 6

18. 10/29/20:

    1. Professor Lu Reviewed Labs 4, 5, and 6

19. 11/03/20-11/19/20: FPGA Project

    1. Students should begin brainstorming Final Projects

    2. Students communicate with their group-mates in and outside of class

    3. Students can ask Professor Lu questions during class time in regards to any challenges face during the Lab or Project phases

25. 11/24/20: FPGA Project

    1. Groups should aim to complete all Labs for the course by this time

26. 11/26/20: NO CLASS

    1. Happy Thanksgiving!

27. 12/01/20: Final Review *pt 1

    1. Groups are given time to work in breakout rooms on their Final Projects

    2. Look through past-published projects for the class

28. 12/03/20: Final Review *pt2

    1. Likely going to be doing a research project on High Frequency Trading with regards to FPGAs

29. 12/08/20: Final Review *pt 3

    1. I confirmed that the role of FPGAs in High Frequency Trading is an acceptable final research project topic

    2. I pushed Labs 1-4 to my GitHub Repository

30. 12/10/20: Final Review *pt 4

    1. Final Day of Classes, students are allowed to meet in breakout rooms with their groups to work on their projects

31. 12/15/20: Final Exam Period

    1. Professor Kevin Lu offers office hours for any students that may have questions pertaining to developing or submitting the final project.

    2. Have a great holiday break Professor!

       1. (And to anyone who is reading this who is also going on a holiday break)

Link to my Final Paper, via Google Docs