Books & Resources

• Digital Systems and Binary Numbers

• UNIT 1 Digital Systems and Binary Numbers

• R’s AND (R-1)’s Complement Of Number Systems

• How To Find r's and (r-1)'s Complement Of Numbers

• Complements - r's and (r-1)'s complements

• Converting Between Number Systems

• GeeksforGeeks: Number System and Base Conversions

• Number System Conversion

Digital Design: With a Introduction to the Verilog Hdl

• Digital Systems Pages#19-21

• Binary Numbers Pages#21-24

• Number‐Base Conversions Pages#24-26

• Octal and Hexadecimal Numbers Pages#26-28

• Complements of Numbers Pages#28-32

• Signed Binary Numbers Pages#32-36

• Binary Codes Pages#36-45

• Binary Storage and Registers Pages#45-48

• Binary Logic Pages#48-51

• Chapter 2 Boolean Algebra and Logic Gates

• Chapter 2: Boolean Algebra and Logic Gates (Similar Chapter Slides)

• Difference between SOP and POS in Digital Logic

• Boolean Logic – SOP Form, POS Form

• Sum Of Product (SOP) & Product Of Sum (POS)

• Sum of Products & Product of Sums

• Difference Between SOP and POS

Digital Design: With a Introduction to the Verilog Hdl

• Introduction Pages#56

• Basic Definitions Pages#56-58

• Axiomatic Definition of Boolean Algebra Pages#58-61

• Basic Theorems and Properties of Boolean Algebra Pages#61-64

• Boolean Functions Pages#64-69

• Canonical and Standard Forms Pages#69-76

• Other Logic Operations Pages#76-78

• Digital Logic Gates Pages#78-84

• Integrated Circuits Pages#84-86

1. Geeks for Geeks: Introduction of K-Map (Karnaugh Map)

2. Karnaugh Maps

3. Chapter 3: Gate-Level Minimization

4. Gate-Level Minimization

5. Karnaugh Maps - Rules of Simplification

6. Karnaugh Maps

Digital Design: With a Introduction to the Verilog Hdl

• Introduction Pages#91

• The Map Method Pages#91-98

• Four‐Variable K-Map Pages#98-102

• Product‐of‐Sums Simplification Pages#102-106

• Don’t‐Care Conditions Pages#106-108

• NAND and NOR Implementation Pages#108-115

• Other Two‐Level Implementations Pages#115-120

• Exclusive‐OR Function Pages#121-126

• Hardware Description Language Pages#126-136

• Combinational Circuits: Covers Most Topics

  • • (Inducing half/full adder, half/full subtrator, Multiplexers and demulitplexers, Encoders and Decoder)

• Binary Adders

• Binary Subtractor

• Geeks for Geeks: Half Adder in Digital Logic

• Geeks for Geeks: Full Adder in Digital Logic

• Half Adder, Full Adder, Half Subtractor & Full Subtractor

• Geeks for Geeks: Carry Look-Ahead Adder

• Geeks for Geeks: BCD Adder in Digital Logic

• The Multiplexer (Explained)

• The Demultiplexer (Explained)

• More On Multiplexers

• Geeks for Geeks: Multiplexers in Digital Logic

• Difference between Multiplexer and Demultiplexer

• Geeks for Geeks: Encoders and Decoders in Digital Logic

• More On Encoders, Priority Encoders and Decoders

• Design and simulation of decoders, encoders, multiplexer and demultiplexer

Digital Design: With a Introduction to the Verilog Hdl

• Introduction Pages#143

• Combinational Circuits Pages#143

• Analysis Procedure Pages#144-147

• Design Procedure Pages#147-151

• Binary Adder–Subtractor Pages#151-162

• Decimal Adder Pages#162-164

• Binary Multiplier Pages#164-166

• Magnitude Comparator Pages#166-168

• Decoders Pages#168-173

• Encoders Pages#173-175

• Multiplexers Pages#176-182

• HDL Models of Combinational Circuits Pages#182-199

• Sequential Logic Circuits

• Know all about Latches and Flip Flops

• Flip Flops in Digital Electronics

• Difference between Latches and Flip-Flops

• Latches and Flip Flops: What are they? (Includes Links for every type of flip flop)

• Latches & Flip Flops

• Digital Circuits 4: Sequential Circuits

Digital Design: With a Introduction to the Verilog Hdl

• Introduction Pages#208

• Sequential Circuits Pages#208-210

• Storage Elements: Latches Pages#211-214

• Storage Elements: Flip‐Flops Pages#214-222

• Analysis of Clocked Sequential Circuits Pages#222-235

• Synthesizable HDL Models of Sequential Circuits Pages#235-249

• State Reduction and Assignment Pages#249-254

• Design Procedure Pages#254-263

• Registers and Counters

• Types of Registers

• The Shift Register

• Geeks for Geeks: Counters in Digital Logic

• Synchronous Counter

• Digital Counters

Digital Design: With a Introduction to the Verilog Hdl

• Registers Pages#273-276

• Shift Registers Pages#276-284

• Ripple Counters Pages#284-289

• Synchronous Counters Pages#289-296

• Other Counters Pages#296-301

• HDL for Registers and Counters Pages#301-308

• Chapter 7 Memory and Programmable Logic

• Programmable Logic Devices

• Geeks for Geeks: Difference between Programmable Logic Array and Programming Array Logic

• Difference Between PLA and PAL

Digital Design: With a Introduction to the Verilog Hdl

• Introduction Pages#317-318

• Random‐Access Memory Pages#318-325

• Memory Decoding Pages#325-330

• Error Detection and Correction Pages#330-333

• Read‐Only Memory Pages#333-339

• Programmable Logic Array Pages#339-343

• Programmable Array Logic Pages#343-347

• Sequential Programmable Devices Pages#347-364