This classroom-tested textbook describes the design and implementation of software for distributed real-time systems, using a bottom-up approach. The text addresses common challenges faced in software projects involving real-time systems, and presents a novel method for simply and effectively performing all of the software engineering steps. Each chapter opens with a discussion of the core concepts, together with a review of the relevant methods and available software. This is then followed with a description of the implementation of the concepts in a sample kernel, complete with executable code.

Requiring only a basic background in computer architecture and operating systems, this practically-oriented work is an invaluable study aid for senior undergraduate and graduate-level students of electrical and computer engineering, and computer science. The text will also serve as a useful general reference for researchers interested in real-time systems.

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The objective of this track is to promote cutting-edge research in real-time systems, especially new and emerging topics. Areas of interest include, but are not limited to, the following: operating systems, networks, middleware, compilers, tools, scheduling, QoS support, resource management, testing and debugging, design and verification, modeling, WCET analysis, performance analysis, fault tolerance, security, and system experimentation and deployment experiences.

This track aims to highlight novel research pertaining to designs, implementations and applications that attend to some aspect of real-time requirements. Continuing with the success in previous years, the track will particularly focus on four specialized areas:

CPS applications (such as transportation, healthcare, industrial control, etc.) interact with the physical world. Hence, they do possess real-time requirements. Papers that identify scientific foundations and technologies that advance the state-of-the-art for CPS are welcome. Topics of interest include (but are not limited to) foundations of CPS, design methods, simulation/emulation for CPS, tool chains, CPS architectures, security and privacy, hardware/software compositions that include physical components, performance analysis, robustness and safety, and analysis techniques and tools especially those with multiple temporal and spatial scales.

This area focuses on design methodologies and tools for hardware/software integration and co-design of modern embedded systems for real-time applications. Topics include (but are not limited to) architecture description languages and tools, hardware architectures, design space exploration, synthesis and optimization. Of special interest are SoC design for real-time applications, special-purpose functional units, specialized memory structures, multi-core chips and communication aspects, FPGA simulation and prototyping, software simulation and compilation for novel architectures and applications, as well as power, thermal, timing and predictability analyses.

Grand challenges in IoT include extremely constrained resources (energy supply, storage and computational power) in IoT devices, unprecedented scalability requirements as well as uncertain dynamics in their operating environments. Submissions that build on solid theoretical foundations, present empirical development, and experimental evaluations for empowering IoT applications with real-time requirements are welcome.

This paper presents novel hardware architecture of dynamic memory manager providing memory allocation and deallocation operations that are suitable for hard real-time and safety-critical systems due to very high determinism of these operations. The proposed memory manager implements Worst-Fit algorithm for selection of suitable free block of memory that can be used by the external environment, e.g. CPU. The deterministic timing of the memory allocation and deallocation operations is essential for hard real-time systems. The proposed memory manager performs these operations in nearly constant time thanks to the adoption of hardware-accelerated max queue, which is a data structure that continuously provides the largest free block of memory in two clock cycles regardless of actual number or constellation of existing free blocks of memory. In order to minimize the overhead caused by implementing the memory management in hardware, the max queue was optimized by developing a new sorting architecture, called Rocket-Queue. The Rocket-Queue architecture as well as the whole memory manager is described in this paper in detail. The memory manager and the Rocket-Queue architecture were verified using simplified version of UVM and applying billions of randomly generated instructions as testing inputs. The Rocket-Queue architecture was synthesized into Intel FPGA Cyclone V with 100 MHz clock frequency and the results show that it consumes from 17,06% to 38,67% less LUTs than the existing architecture, called Systolic Array. The memory manager implemented in a form of a coprocessor that provides four custom instructions was synthesized into 28nm TSMC HPM technology with 1 GHz clock frequency and 0.9V power supply. The ASIC synthesis results show that the Rocket-Queue based memory manager can occupy up to 24,59% smaller chip area than the Systolic Array based manager. In terms of total power consumption, the Rocket-Queue based memory manager consumes from 15,16% to 42,95% less power.

RTSS especially welcomes new and emerging topics that address aspects of real-time requirements as stated above. Such topics may include machine learning techniques for the design and analysis of real-time systems, system design approaches for achieving real-time machine learning, resource management in autonomous systems, system-level solutions for real-time applications exploiting domain-specific accelerators, etc.

Empirical survey-based research focused on the real-time systems field is also welcome. This type of research uses surveys, questionnaires, interviews, use-cases, or other empirical techniques to obtain information about the past / current / future state of play in the research, design, development, verification, validation, and deployment of real-time systems. (Note literature surveys that classify, review, and summarize existing research papers are not considered empirical research and are not in scope of the conference).

Cyber-Physical Systems (CPS) encompass a broad scope such as safety-critical, autonomous, or robotic systems. CPS applications (such as transportation, healthcare, industrial control, etc.) interact with the physical world. Hence, they do possess real-time requirements. Papers that identify scientific foundations and technologies that advance the state-of-the-art for CPS are welcome. Topics of interest include (but are not limited to) foundations of CPS, design methods, simulation/emulation for CPS, tool chains, CPS architectures, embedded machine-learning implementation, security, performance analysis, robustness, safety assessment, and hardware/software compositions.

RTSS especially welcomes new and emerging topics provided that they address some aspects of real-time requirements as stated above. Such topics may include machine learning techniques for the design and analysis of real-time systems, system design approaches for achieving real-time machine learning, resource management in autonomous systems, system-level solutions for real-time applications exploiting domain-specific accelerators, etc.

Empirical survey-based research focused on the real-time systems field is also welcome. This type of research uses surveys, questionnaires, interviews, use-cases or other empirical techniques to obtain information about the past / current / future state of play in the research, design, development, verification, validation, and deployment of real-time systems. (Note literature surveys that classify, review, and summarize existing research papers are not considered empirical research and are not in scope of the conference).

This track aims to highlight the newest research achievements in designs, implementations and applications that must attend to some aspects of real-time requirements. Continuing with the success in previous years, the track will particularly focus on four specialized areas:

Real-time computing (RTC) is the computer science term for hardware and software systems subject to a "real-time constraint", for example from event to system response.[1] Real-time programs must guarantee response within specified time constraints, often referred to as "deadlines".[2]

Real-time responses are often understood to be in the order of milliseconds, and sometimes microseconds. A system not specified as operating in real time cannot usually guarantee a response within any timeframe, although typical or expected response times may be given. Real-time processing fails if not completed within a specified deadline relative to an event; deadlines must always be met, regardless of system load.

A real-time system has been described as one which "controls an environment by receiving data, processing them, and returning the results sufficiently quickly to affect the environment at that time".[3] The term "real-time" is used in process control and enterprise systems to mean "without significant delay".

Real-time software may use one or more of the following: synchronous programming languages, real-time operating systems (RTOSes), and real-time networks, each of which provide essential frameworks on which to build a real-time software application.

Systems used for many safety-critical applications must be real-time, such as for control of fly-by-wire aircraft, or anti-lock brakes, both of which demand immediate and accurate mechanical response.[4]

The term real-time derives from its use in early simulation, in which a real-world process is simulated at a rate that matched that of the real process (now called real-time simulation to avoid ambiguity). Analog computers, most often, were capable of simulating at a much faster pace than real-time, a situation that could be just as dangerous as a slow simulation if it were not also recognized and accounted for. 589ccfa754

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