Personal webpage of Mrs. Annu Dabas
Bharati Vidyapeeth’s College of Engineering, New Delhi
Mrs. Annu Dabas
Assistant Professor
Department of Electronics and Communication
Bharati Vidyapeeth’s College of Engineering
A-4, Paschim Vihar
Delhi- 110063, India
Email: annu.dabas@bharatividyapeeth.edu
Phone: 011-25278444/25278443 (Ext- )
Education:
PhD (Pursuing)
M.Tech (VLSI Design)
B.E (ECE)
Research field:
Analog Circuit Design
VLSI Design
Courses taught:
Analog Electronics II
VLSI Design
Control System
Digital System Design
Signal and System
FDP/Seminar/Workshop organized:
Organized a seminar on Aspire Higher Scholars Program by Ms. Krithika Srinivasan, Director, Career Lab Technologies Pvt. Ltd. on 21st April 2022 in collaboration with Higher Study Cell, BVCOE, New Delhi
Organizing committee member of event IDEATHON in Confluence 2.0 for 2nd year (4th sem) students of ECE department, BVCOE, New Delhi
Organized a webinar on Controls by ACE Academy for 3rd year students on 27th Nov 2021.
Core member of organizing committee of FDP "Emerging trends in Electronics and Communication Engineering” from 12/07/21 to 16/07/21 organized by ECE dept, BVCOE, New Delhi
Core member of organizing committee of Six Day Technical Skill Enhancement Workshop on SRAM (Specs Finalization to Tapeout) from 5/10/17 to 10/10/17 organized by ECE dept, BVCOE, new Delhi
STC/Workshop/FDPs attended:
Inculcating Universal Human Values in Technical Education from 9/5/22 to 13/5/22 organized by AICTE
Emerging trends and challenges in Communication from 18/10/21 to 22/10/21 organized by ECE dept, NIT, New Delhi
Moodle open-source learning system from 7/9/20 to 12/9/20 organized by BVICAM, New Delhi in online mode
Digital & Analog IC Design Using Cadence Virtuoso from 24/08/20 to 26/08/20 organized by Indraprastha Engineering College, Ghaziabad (online mode)
ICT/LMS Tools for Teaching & Learning from 16/06/20 to 19/06/20 organized by K.C. College of Engineering & Management Studies & Research, Thane (E) in online mode
ICT BASED FDP on Design Challenges in Low Power VLSI Design from 16/12/19 to 20/12/19 organized by ECE dept, IGDTUW, New Delhi
A Practical Approach to Signals & Systems from 09/07/18 to 13/07/18 organized by ECE dept, KEC, Ghaziabad
Machine Learning in Predictive Modelling from 23/04/18 to 27/04/18 organized by ICE dept, BVCOE, new Delhi
ASIC Design using Mentor Graphics Tools from 25/09/17 to 26/09/17 organized by ECE dept, BVCOE, new Delhi
Publications:
Annu Dabas, Richa Yadav, Maneesha Gupta. “Improved performance recycling folded cascode OTA using multipath positive feedback and pseudo differential pair for biasing”, Sadhana 47, 162, Aug 2022. (SCIE)
Annu Dabas, Shweta Kumari, Maneesha Gupta, Richa Yadav, “Design and analysis of DTMOS based RFC with controlled positive feedback OTA using HSCCM and Adaptive biasing Technique”, Integration the VLSI Journal, 90, 90-103, May 2023 (SCIE)
Annu Dabas, Shweta Kumari, Maneesha Gupta, Richa Yadav, "Design and Analysis of Class AB RFC OTA with Improved Performance," 8th International Conference on Signal Processing and Communication (ICSC), Noida, India, pp. 582-586, Dec 2022 (Scopus)
Annu Dabas, Richa Yadav, Maneesha Gupta, “A Novel Controlled Positive Feedback Class AB OTA”, Proceedings of First International Conference on Computational Electronics for Wireless Communications. Lecture Notes in Networks and Systems, vol 329. Springer, Singapore, Jan 2022. DOI:10.1007/978-981-16-6246-1_15 (Scopus)
Annu Dabas, Kanchan Grover "Peak Detector using Low Voltage Operational Transresistance Amplifier", International Journal of Engineering Trends and Technology (IJETT), V58(3),110-113, April 2018. DOI: 10.14445/22315381/IJETT-V58P221 (Scopus)
Annu Dabas, Neha Arora, “Tunable filters using Operational Transresistance Amplifier”, International Journal of Electrical and Electronics Engineering (IJEEER) ISSN(P): 2250-155X; ISSN(E): 2278-943X Vol. 4, Issue 4, Aug 2014, 103-112.