Hello! I'm currently in my third year of pursuing a Ph.D. at the École Polytechnique Fédérale de Lausanne (EPFL) located in Switzerland. Under the guidance of Prof. Babak Falsafi, my research revolves around the evaluation of performance and silicon efficiency in general-purpose server CPUs. Specifically, I'm investigating the execution of scale-out server workloads across a range of x86 and ARM platforms. My research covers a broad spectrum, extending from the software stack of server workloads to computer architecture considerations.
Contact me:
Email: ali /dot/ ansari /at/ epfl /dot/ ch
address:
EPFL IC ISIM PARSA INJ 215 (Bât. INJ) Station 14, CH-1015, Lausanne, Switzerland
Doctor of Philosophy (Ph.D.), École Polytechnique Fédérale de Lausanne (EPFL), Sep. 2020 - Present
School of Computer and Communication Sciences
Supervisor: Prof. Babak Falsafi, Parallel Systems Architecture Lab (PARSA)
Master of Science (M.S.), Sharif University of Technology, Aug. 2017 - Aug. 2019
School of Computer Engineering
Thesis title: Instruction Cache Miss Rate Reduction with Timely Next-Line Prefetching
Supervisors: Prof. Hamid Sarbazi-Azad, Prof. Pejman Lotfi-Kamran
Ali Ansari, Fatemeh Golshan, Rahil Barati, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
IEEE Transactions on Computers 72.3 (2022): 732-743
Also appeared in the first instruction prefetching championship (IPC-1), a workshop held with ISCA 2020
Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
In 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
Fatemeh Golshan, Mohammad Bakhshalipour, Mehran Shakerinava, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
IEEE Computer Architecture Letters 19.2 (2020): 130-133
Chapter 5: State-of-the-art data prefetchers, Chapter 6: Evaluation of data prefetchers
Advances in Computer Systems, Volume 125, 1-89