In this project I was able to build a Single Cycle Processor that was able to perform the Load Word operation.
I used the Xilinx IDE software to build this using Verilog Code.
This project consisted of the basic processor components such as:
All of the components listed above were instantiated and put together top module for test-benching.
Processor RTL schematic
Parts inside the processor
Load word [PC,RAM addresses to be loaded into Register File] - Last three wave forms
Load Word [RAM addresses being loaded into Register File] - RF addresses 6, 7, 8, 9, 10