Unleashing the Power of Google TPUs:

Accelerating AI, Science, and Data Analytics

March 18, 2025 11:00 AM - 12:00 PM CDT

Online

About the Session

Join Google's Norm Jouppi for an in-depth exploration of Tensor Processing Units (TPUs), the specialized hardware accelerators designed to revolutionize AI, science, and large-scale data analytics. This session will provide a comprehensive overview of TPUs, covering their design principles, key objectives, and the distinct advantages they offer over traditional processors. Norm will delve into the architecture of TPUs and explain how their unique capabilities enable significant performance gains for a wide range of workloads. Discover the ideal use cases for TPUs across various domains, including deep learning, scientific computing, and massive data analysis. Learn how TPUs can accelerate training times for complex AI models, enhance the performance of HPC simulations, and enable faster processing of massive datasets. This session is a must-attend for anyone looking to leverage the power of TPUs to drive innovation in their respective fields.

Speaker

Norm Jouppi
VP, Engineering Fellow, Google

Norman P. Jouppi is a Google Fellow. He is the tech lead for Google Tensor Processing Units (TPUs). Norm is known for his innovations in computer memory systems, was the principal architect and lead designer of several microprocessors, contributed to the architecture and design of graphics accelerators, and extensively researched telepresence. His innovations in microprocessor design have been adopted in many high-performance microprocessors.

Norm received his Ph.D. in electrical engineering from Stanford University in 1984, and a master of science in electrical engineering from Northwestern University in 1980. While at Stanford, he was one of the principal architects and designers of the MIPS microprocessor, and developed techniques for MOS VLSI timing verification. He joined HP in 2002 through its merger with Compaq, where he was a Staff Fellow at Compaq’s Western Research Laboratory (formerly DECWRL) in Palo Alto, California. In 2010 he was named an HP Senior Fellow. From 1984 through 1996, he was a consulting assistant/associate professor in the electrical engineering department at Stanford University where he taught courses in computer architecture, VLSI, and circuit design.

Norm holds more than 125 U.S. patents. He has published over 125 technical papers, with several “best paper” awards and two International Symposium on Computer Architecture (ISCA) Influential Paper Awards. He is the recipient of the 2014 IEEE Harry H. Goode Award and the 2015 ACM/IEEE Eckert-Mauchly Award. He is a Fellow of the ACM, IEEE, and AAAS, and a member of the National Academy of Engineering.