Καθηγητής Κώστας Ψυχαλίνος

FPAA Implementation of Power-Law Compensator

Field Programmable Array (FPAA) implementation of a power-law compensator, by Stavroula Kapoulea

Single Transistor FO Filter Using MWCN Device

Single transistor fractional-order filter using a multi-walled carbon nanotube device, implemented by Panagiotis Bertsias

Fractional-Order Capacitor

Fabricated chip of fractional-order capacitor emulator (AMS 0.35um process), designed by G. Tsirimokou and C. Psychalinos.

Fractional-Order Inductor

Fabricated chip of fractional-order inductor emulator (AMS 0.35um process), designed by G. Tsirimokou and C. Psychalinos.

Complex filter for Bluetooth/Zigbee Apps

Fabricated chip of complex filters using current mirrors (AMS 0.35um process), designed by C. Laoudias and C. Psychalinos.

Universal Biquad Filter

Fabricated chip of universal biquad filter using current mirrors (AMS 0.35um process), designed by C. Laoudias and C. Psychalinos

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