Contact Info & Short Bio

Yusuke OIKE

Contact Information:

yusukeoike [at] gmail.com

Affiliation:

Sony Semiconductor Solutions Corporation, Japan

Education:

B.S. in E.E., the University of Tokyo, Japan, Mar. 2000

M.S. in E.E., the University of Tokyo, Japan, Mar. 2002

Ph.D. in E.E., the University of Tokyo, Japan, Mar. 2005 [PDF]

Professional Activities:

Program Committee, VLSI Symposium on Circuits 2016 -

Designer's Forum Committee, ASP-DAC 2017 -

Program Committee (ITPC), ISSCC 2012 - 2016

- Forum Organizer/Chair, ISSCC 2014:

"3D stacking technologies for image sensors and memories"

- Guest Editor, Journal of Solid-State Circuits (JSSC), Jan. 2016.

Visiting Scholar at Stanford University, 2010-2011

Short Bio.

Yusuke Oike received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Tokyo, Japan in 2000, 2002 and 2005, respectively. In 2005, he joined Sony Corporation, Japan, where he has been engaged in research and development of architectures, circuits and devices for CMOS image sensors. From 2010 to 2011, he was a visiting scholar at Stanford University, and worked with Prof. Abbas El Gamal for hardware implementation of compressed sensing. Since 2016, he has worked for Sony Semiconductor Solutions Corporation, Japan. His research interests include architecture and mixed-signal circuit design for image sensors and image processing. He is a member of the IEEE and the ITE of Japan.