[In Japanese]

Yusaku Kaneta

Ph.D. in Computer Science

North-14 West-9, Sapporo, 060-0814, Japan.

 

(I am currently working for Rakuten Institute of Technology in Japan.)

Tel: +81-11-706-7677

Fax: +81-11-706-7680

E-mail: y-kaneta (at) ist.hokudai.ac.jp


Research

  • Algorithms based on word-level parallelism.
  • String processing (pattern matching, bit-parallel algorithms, ...)
  • FPGA implementation of string algorithms.
Publications

    Journal Papers

  • Kunihiro Wasa, Yusaku KanetaTakeaki Uno, and Hiroki Arimura,
    Constant Time Enumeration of Subtrees with Exactly k Nodes in a Tree,
    IEICE Transactions on Information and Systems, Vol. E97-D, No. 3, 2014.

  • Yusaku Kaneta, Hiroki Arimura, and Rajeev Raman,
    Faster Bit-Parallel Algorithms for Unordered Pseudo-Tree Matching and Tree Homeomorphism,
    Journal of Discrete Algorithms, Elsevier, 2012.

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    A Dynamically Reconfigurable FPGA-based Pattern Matching Architecture for Subclasses of Regular Expressions,  
    IEICE Transactions on Information and Systems, Vol. E95-D, No. 7, 2012.

    Conference Papers (refereed)
  • Kunihiro Wasa, Yusaku Kaneta, Takeaki Uno, and Hiroki Arimura,
    Constant Time Enumeration of Bounded-Size Subtrees in Trees and Its Application,
    In Proc. of the 18th Annual International Computing and Combinatorics Conference (COCOON 2012),
    Lecture Notes in Computer Science, vol. 7434, pp. 347-359, Springer-Verlag, Sydney, Australia, August 2012.

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    Dynamic Reconfigurable Bit-Parallel Architecture for Large-Scale Regular Expression Matching
    In Proc. of the 2010 International Conference on Field-Programmable Technology (FPT 2010), 
    pp. 21-28, Beijing, China, December 2010. (nominated for Best Paper Candidates)
    (Also appeared in: TCS-TR-A-10-45, June 2010. [pdf])

  • Yusaku Kaneta, Shin-ichi Minato, and Hiroki Arimura,
    Fast Bit-Parallel Matching for Network and Regular Expressions
    In Proc. of the 17th Symposium on String Processing and Information Retrieval (SPIRE 2010), 
    Lecture Notes in Computer Science, vol. 6393, pp. 372-384, Springer-Verlag, Los Cabos, Mexico, October 2010. [slide][errata][photo]
    (Also appeared in: TCS-TR-A-10-47, November 2010. [pdf])

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    Efficient Multiple Regular Expression Matching on FPGAs based on Extended SHIFT-AND Method
    In Proc. of the 16th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2010), 
    Taipei, Taiwan, October 2010.

  • Yusaku Kaneta and Hiroki Arimura,
    Faster Bit-Parallel Algorithms for Unordered Pseudo-Tree Matching and Tree Homeomorphism
    In Proc. of the 21st International Workshop on Combinatorial Algorithms (IWOCA 2010), 
    Lecture Notes in Computer Science, vol. 6460, pp. 68-81, Springer-VerlagLondon, UK, July 2010. [slide]
    (Also appeared in: TCS-TR-A-10-43, May 2010. [pdf])

    Conference Papers (not refereed)

  • Kunihiro Wasa, Yusaku Kaneta, Takeaki Uno, and Hiroki Arimura,
    Constant Time Enumeration of Bounded-Sized Subtrees in Trees Based on Reverse Search
    In Proc. of the 15th Japan-Korea Joint Workshop on Algorithms and Computation (WAAC 2012), 
    Tokyo, Japan, July 10–11, 2012.

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, and Hiroki Arimura,
    High-speed String and Regular Expression Matching on FPGA
    In Proc. of the Asia-Pacific Signal and Information Processing Association 2011 Annual Summit and Conference (APSIPA ASC 2011), 
    Xi'an China, October 2011.

  • Yusaku KanetaShingo YoshizawaShin-ichi MinatoHiroki Arimura, and Yoshikazu Miyanaga,
    Fast String Matching Hardwares Based on Bit-Parallel Method for Data Streams

    In Proc. of the 2011 International Symposium on Multimedia and Communication Technology (ISMAC 2011), 
    GCOE-RA Special Session on Advances in VLSI/FPGA Technologies, 
    Sapporo, Japan, September 2011.

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    Dynamic Reconfigurable Architecture on FPGA for Large-Scale Regular Expression Matching
    In Proc. of the 4th International Symposium on Global COE Program of Center for Next Generation 
    Information Technology Based on Knowledge Discovery and Knowledge Federation, 
    Sapporo, Japan, January 2011.

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    An FPGA-Based Stream Processing System for Efficient Multiple Regular Expression Matching
    In Proc. of the 2010 Interenational Symposium on Global COE Program of Center for Next Generation 
    Information Technology based on Knowledge Discovery and Knowledge Federation, 
    Sapporo, Japan, January 2010.

  • Shin-ichi Minato and Yusaku Kaneta, 
    A Data Stream Processing System for a Multiple Regular Expression Matching using FPGA
    Panel Session "Hardware Software Co-research for Efficient Information Processing," 
    Abstract of the Asia-Pacific Signal and Information Processing Association 2009 Annual Summit and Conference (APSIPA ASC 2009), 
    Sapporo, Japan, October 2009. 
    [pdf]

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    A Fast String Matching Algorithm and Its FPGA Design for High-Speed Stream Processing,  
    Student Debate Session, PHAROS Summer School, 
    Como, Italy, June 2009. [
    link]

    Technical Reports

  • Yusaku Kaneta, Shin-ichi Minato, and Hiroki Arimura,
    Fast Bit-Parallel Matching for Network and Regular Expressions
    Technical Report TCS-TR-A-10-47, Hokkaido University, Division of Computer Science, November 2010. [
    pdf]
    (This technical report has been accepted to SPIRE 2010 conference as a full paper.)

  • Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, and Yoshikazu Miyanaga,
    Dynamic Reconfigurable Bit-Parallel Architecture for Large-Scale Regular Expression Matching
    Technical Report TCS-TR-A-10-45, Hokkaido University, Division of Computer Science, June 2010. [pdf]
    (This technical report has been accepted to FPT 2010 conference as a full paper.)

  • Yusaku Kaneta and Hiroki Arimura,
    Faster Bit-Parallel Algorithms for Unordered Pseudo-Tree Matching and Tree Homeomorphism
    Technical Report TCS-TR-A-10-43, Hokkaido University, Division of Computer Science, May 2010. [
    pdf]
    (This technical report has been accepted to IWOCA 2010 conference as a full paper.)

  • Yusaku Kaneta, Shin-ichi Minato, and Hiroki Arimura,
    An Efficient Matching Algorithm for Acyclic Regular Expressions with Bounded Depth
    Technical Report TCS-TR-A-10-40, Hokkaido University, Division of Computer Science, February 2010. [pdf] (submitting)

Talks
  • Yusaku Kaneta,
    Recent Results on Word-RAM algorithms in Rakuten
    ERATO ALSIP Special Seminar 2014, Kyoto, Japan, Dec 2014.


  • Yusaku Kaneta,
    Broadword Implementation of Excess Search for Parenthesis Queries,
    In the 4th International Workshop on Algorithms for Large-Scale Information Processing in Knowledge Discovery (ALSIP 2014)
    in conjunction with PAKDD 2014, Tainan, Taiwan, May 2014.

  • Yusaku Kaneta and Hiroki Arimura,
    Large-scale Pattern Matching on Reconfigurable Hardware
    In the 5th Workshop on Compression, Text, and Algorithm (WCTA 2010)
    in conjunction with SPIRE 2010, 
    Los Cabos, Mexico, October 2010. [abstract]
Others
  • Reviewers: WALCOM 2011, ISAAC 2011, ...
Experience
  • 2012/04 - : Rakuten Institute of Technology, Rakuten Inc., Japan.
  • 2009/05 - 2012/03: Research Assistant for Hokkaido University Global COE Project. [link]
  • 2008/08 - 2008/09: Internship at Sony LSI Design Inc. [link]
  • 2008/08 - 2008/08: Teaching Assistant for Open Campus 2008 in School of Engineering Hokkaido University.
  • 2008/04 - 2008/05: Teaching Assistant for Teaching programming in C.
  • 2007/11 - 2007/12: Teaching Assistant for Teaching information theory and information mathematics.
  • 2007/08 - 2007/08: Teaching Assistant for Open Campus 2007 in School of Engineering Hokkaido University.