Wei Liu, Ph.D.

Software Architect / Project Lead
Mobile and Communications Group
Intel Corporation
 
E-mail: dr.weiliu at gmail.com or wei.w.liu at intel.com
Address:
     2200 Mission College Blvd. 
     Santa Clara, CA 95054

Bio

Wei Liu received his B.S. and Ph.D. in Computer Science from Tsinghua University, China, in 1997 and 2001 respectively. He is currently working as a software architect and project lead in Software Innovations and Infrastructure Group at Intel. He is leading multiple projects on SoC SW development. He was a staff researcher at Intel Labs working on parallel programming model, binary translation, compiler technology, and multi-core CPU and GPGPU architecture. Before he joined Intel, he was a research scientist of Computer Science at UIUC with Prof. Josep Torrellas.
 
His interests include mobile software engineering, hetergeneous programming, computer architecture and compilers for chip multiprocessors,  parallel programming languages and compiler optimizations, software and hardware co-design, system software productivity tools and system-on-chip (SoC) architecture and software.

Selected Publications    [Completed Paper List]

Journal Papers

[IEEE MICRO] Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck and Josep Torrellas
   Energy-Efficient Thread-Level Speculation on a CMP
   IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, Jan-Feb 2006

 
[ACM TACO] Yuanyuan Zhou, Pin Zhou, Feng Qin, Wei Liu and Josep Torrellas
   Efficient and Flexible Architectural Support for Dynamic Monitoring,
   ACM Transactions on Architecture and Code Optimization (TACO), Volume 2 Issue 1, March 2005
   
[IEEE MICRO] Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou and Josep Torrellas
   iWatcher: Simple and General Architectural Support for Software Debugging,
   IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, Nov-Dec 2004

Coference Papers

[ICCD'07] James Tuck, Wei Liu, and Josep Torrellas

CAP: Criticality Analysis for Power-Efficient Speculative Multithreading

XXV IEEE International Conference on Computer Design (ICCD), Oct 2007

[DSN'07] Pablo Montesinos, Wei Liu, and Josep Torrellas

Using Register Lifetime Predictions to Portect Register Files Against Soft Errors

International Conference on Dependable Systems and Networks(DSN), June 2007

[MICRO'06] Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou and Josep Torrellas
   PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
   The 39th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO-39), Dec 2006
   
[PPoPP'06] Wei Liu, James Tuck, Luis Ceze, Karin Strauss, Jose Renau and Josep Torrellas
   A TLS Compiler that Exploits Program Structure
   ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), Mar 2006
   
[MICRO'05] Smruti Sarangi, Wei Liu (equal contribution), Josep Torrellas and Yuanyuan Zhou
   ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing,
   The 38th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO-38), Nov 2005.
   
[P=ac2'05] Wei Liu, James Tuck, Luis Ceze, Karin Strauss, Jose Renau and Josep Torrellas
   POSH: A Profiler-Enhanced TLS Compiler that Leverages Program Structure
   The 2nd IBM P=ac2 Conference, Sep 2005
   
[ICS'05] Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas
   Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation
   ACM International Conference on Supercomputing (ICS), June 2005
   
[ICS'05] Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas
   Thread-Level Speculation on a CMP Can Be Energy Efficient,
   ACM International Conference on Supercomputing (ICS), June 2005
   
[MICRO'04] Pin Zhou, Wei Liu, Long Fei, Shan Lu, Feng Qin, Yuanyuan Zhou, Sam Midkiff and Josep Torrellas
   AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-based Invariants,
   The 37th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO-37), Dec 2004
   
[ISCA'04] Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou and Josep Torrellas
   iWatcher: Efficient Architectural Support for Software Debugging
   The 31st Annual International Symposium on Computer Architecture (ISCA), Munchen, Germany, Jun 19-23, 2004
   

Professional Activities and Services

  • Finance and Publications Chair: ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), 2006
  • Webmaster: IEEE Micro's Top Picks for Microarchitecture Conferences, 2005
  • Finance Chair: International Conference on Parallel Architecture and Compilation Techniques (PACT), 2005
  • Web Chair: 11th International Symposium on High-Performance Computer Architecture (HPCA), 2005
  • Webmaster: HPCA repository


Free Hit Counter