μSys provides
innovative technical advisory and consulting services within the
fields of advanced electronics and power control systems. Our
services commit to providing a high quality technical expertise
product at a high benefit to cost ratio. We
design,
develop and produce customized embedded electronic hardware and
software control systems.
Our
fields of competency include analogue and digital electronics,
ASIC/FPGA/DSP architecture and design, switched mode power
conversion, feedback control systems, software and computer
engineering. Since 1995 our hardware and software architectures have
been applied in areas such as mixed-signal co-simulation software,
wireless data telemetry, propulsion and guidance, vibration control,
platform stabilization, model reference profiling adaptive
controllers, energy harvesting, switched mode Providing our customers access to customized technical advisement and market research within their target industry, facilitates an integral component of a well informed, successfully managed product development strategy. We assist our clients in developing ambitious concepts, solutions and implementations that maximize their return on investment while mitigating technological obsolescence and unnecessary systemic risk. From conceptual product definition and specification to architecture, partitioning and implementation, we offer a detail and research oriented approach to technical product development and project management. A firm foundation in physics, electromagnetic theory from first principles, advanced mathematics and electronics implementation provides us a keen ability to visualize, predict and implement future technology trends. This translates into novel implementations, advanced features leading to faster product adoption by the customer and increased customer engagement in the product evolution cycle. Let us assist in developing the concepts that lead to your company's next successful product introduction. The following provides a brief itemization of our general development line items: * State Space-Vector Modulation, modified/symmetrical SVM * Direct-quadrature IRP pq-theory “3-2 Clark” and "2-3 Park" orthonormal transformation feedback compensation methods * PFC switching duty cycle computation * PFC boost inductor energy, inductance, core selection, fringing, gapping and optimization * PFC inductor leakage inductance * PFC DC bus ripple voltage * PFC DC bus total holdup capacitance * PFC switch hard switching and conduction losses * PFC Vienna rectifier Boost Diode conduction and non-SiC switching losses * PCB microstrip trace impedance * PCB microstrip resistive series source and RCD shunt load termination techniques * PCB trace skin effect resistance, temperature rise and optimization (power switching planes) * Snubber design for hard switched devices * Creepage and high voltage isolation * X & Y EMI suppression capacitors * LCL filter design * Common mode filter design * Current doubler rectifier design * Current sense amplifier design * Gate driver design (transformer coupled or isolated all semiconductor) * ZVS half bridge totem-pole switch effective output capacitance (Coss) computations * ZVS critical primary current * ZVS transformer primary, secondary, all primary referred leakage inductance and core selection * ZVS resonant LLC resonant inductance * ZVS resonant LLC ZVS dropout power and current * ZVS resonant LLC soft switching conduction losses * ZVS resonant LLC resonant dead-time computationsoptimum * ZVS full H-bridge switch conduction losses * ZVS transformer secondary, full bridge, full wave or current doubler diode or synchronous rectifier conduction losses * Output full bridge, full wave or current doubler inductor and capacitor computations and specification * AC/DC converter output capacitance/qty based on Aluminium capacitor ripple current and ripple operational service life * Ceramic and film capacitor ripple current operational service life * Capacitor ESR and total power loss computations * Aluminium capacitor thermal resistance and forced air flow cooling requirements * Semiconductor switch thermal resistance, heat sinking and forced air flow cooling requirements * s and z domain TypeII/III Compensator design and optimization * Dual V/I closed loop digital phase margin stability feedback compensation methodsZVS resonant LLC and quasi-resonant secondary side duty cycle lossThe criterion for ZVS operation is met when the energy imparted to the totem-pole effective output capacitance Coss is =< the energy imparted to the total resonant inductance composed of both primary referred leakage inductance and any additional discrete resonant inductance. The energy stored in the resonant inductor is proportional to the peak inductor current which takes some finite quantity of time to develop. This resonant inductor charge time is the source of secondary side duty cycle loss as during this period, no power is transferred between the primary and secondary. ZVS operation is only assured below some maximum (primary) reflected load resistance, or minimum output power. The size of the resonant inductance thus determines the minimum ZVS output power. Wider ZVS operational load compliance leads to increased resonant inductance and thus greater secondary side duty cycle loss. For a high turns ratio H-bridge stage, the implications can be dramatic. Secondary side duty cycle loss results in reduced average rectified secondary side voltage. Thus for a required minimum average rectified voltage, the turns ratio must be increased accordingly with an accompanying increase of pre-rectified peak secondary side voltage. This may result in the avalanche breakdown voltage of the secondary switches being reached, requiring the choice of a higher voltage rated switch along with, for MOSFETs, greater on resistance, power dissipation and loss of efficiency. State Space-Vector Modulation Fundamentals
Consider
a DC to sinusoidal
3- ϕ
sine wave output synchronized to the command reference input.
For
a three phase power converter comprising three half-bridge switches
where the upper and lower switches are switched 180 With this configuration, the aforementioned state machine comprises six discrete states each of which is responsible for operation within its sector during which the PWM duty cycle of each of the three half-bridge switches is computed on a per cycle basis at the PWM switching frequency, from the advancing phase angle of the reference input. As the phase angle advances to the border of the current sector, the state machine transitions to the following state where the operation is repeated. Each of the six states, by virtue of the three-bit Gray coded state variable (vector), has the ability to produce a voltage on each of the three output phases, within each of the six sectors of a full cycle at the line fundamental. As the six states are synchronized to and sequenced through completely during one full cycle at the radial frequency of the reference vector, three phase voltage outputs are synthesized.
Space
Vector Modulation relies on the principle that any vector inside
the dashed hexagon can be expressed as the time or pulse duration
weighted average combination of any two adjacent active space vectors
and the null-state vectors 0 (000) and 7 (111). In
order to obtain optimum harmonic performance
and the minimum switching frequency for each
of the power switching devices, the state sequence is arranged such
that the transition from one state to the next is performed by
switching only one half-bridge inverter leg at a time. As the weight of adjacent active state vectors always differs by one, then either of the null vectors (000) or (111) can be judiciously inserted within active state vector time-weighted switching sequences, whilst still preserving Gray coding and thus minimum switching, and enabling either inter sector time averaged synthesis of a desired voltage or equivalently, optimum vector angular positioning. For instance, within sector III, the synthesis of an optimum intermediate voltage may be achieved by switching the symmetrical state vector sequence 7340437 while within sector IV the state sequence is 7540457. In this example both the two null state vectors 7 (111) and 0 (000) were judiciously inserted at both ends and middle respectively of the switching sequence comprising state vectors 3,4 and 4,5 whilst preserving Gray coding. Note that sector to sector state vector transition sequences always begin and end with a null state vector. Also, in order to preserve Gray coding, active state vector sequences are either forward or reversed depending on whether the sector is even or odd and the placement of the null state vectors 0 and 7. As a result, the state vector sequences for sectors III and IV of the previous example could alternatively have been 0437340 and 0457540 respectively. Six-step
hexagonal state space vector switching operation alone will not
produce sufficiently low THD as this output waveform does not
sufficiently approximate a sine. Indeed the sharp vertices of the
state space hexagon define an imperfect approximation to a smooth
circle. In order to remove the sharp hexagonal vertices, the optimum
state space vector trajectory is that which encompass the largest
inscribed circle of radius within the bounds of the state space hexagon, where the
absolute magnitude of any active state vector
is 2/3 Note: The above is an excerpt from the document |