Research
LIRMM - UMR CNRS 
Microelectronic Dpt
Head of the Labex NUMEV

Teaching
Deputy Head  Industrial and International Relationships

Tel : +33 (0) 4 67 41 85 67
Email : lionel.torres{at}umontpellier.fr 

Keywords : System level architecture, Security & Cryptographic architectures & applications, Non-Volatile Computing (spintonic/MRAM)

I obtained respectively my Master and PhD degree in 1993 and 1996 from the University of Montpellier (now University of Montpellier). From 1996 to 1997 I was in ATMEL company as IP core methodology R&D engineer. From 1997 to 200 I was assistant professor at the University of Montpellier 2, Polytech Montpellier (Microelectronic design) and LIRMM laboratory. Since 2004 I am full Professor and was at the head of the Microelectronic dpt of the LIRMM from 2007 to 2010. I am now deputy head of Polytech Montpellier (engineering school of Montpellier) in charge of research and industrial relationship. My research interests and skills concern system level architecture, with a specific focus in the security and cryptographic applications and Non-Volatile Computing based on MRAM. Since 2015 I am at the Head of the cluster of excellence Labex NUMEV (Digital and Hardware Solutions and Modeling for the Environment and Life Sciences), a structuring project (labeled in 2011 by the Programme d'Initiative d'Excellence) of the University of Montpellier. I am involved in different major conference as DATE, VLSI, FPL, ISVLSI, DAC and is (co)author of  more than 50 journal papers and 150 conference publications and 10 patents. I am also involved into the ALGODONE spin-off, company created with the support of the University of Montpellier, CNRS and SATT Axlr on IP Protection.

https://fr.linkedin.com/in/lionel-torres-2a81365


Steering Committees and Editor Ship involvement

DATE : Design, Automation and Test in Europe
FPL -  International Conference  on Field Programmable Logic and Applications
ISVLSI - IEEE Computer Society Annual Symposium On VLSI
VLSI-SOC - IFIP/IEEE International Conference on Very Large Scale Integration
ReCoSoC'2014 - International Symposium on Reconfigurable Communication-centric Systems-on-Chip (Local Organization Chair and PC member)
EWME -  Workshop on Microelectronic Education
CryptArchi - International Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices





News and Agenda
  • December 5, Seminar on on/off Computing at SPINTEC, Grenoble
  • November 27-28 Scientific Days NUMEV at the University of Montpellier
  • November 15 International Days at Polytech Montpellier
  • October 25, Forum of Companies at the University of Montpellier, 
  • October 10, I will attend as key note speaker at RTNS 2018
  • October 7-10, I will attend the IFIP VLSI-SOC Conference at Verona (Italy), I will organise the special session on memories and emerging technologies
  • September 24, The Call of project, Pathfinder Projects of NUMEV is closed - 37 projects submitted !
  • September 24, A nice newspaper article on Polytech Montpellier 
  • September 17, The renewal project of NUMEV was submitted
  • September 11-13, H2020 GREAT meeting in Karlsruhe with reviewers and project officer.
  • September 11, Algodone reach the Thales and Station F cybersecurity program

Gallery

(a) Hybrid CMOS - MRAM design (Non-volatile flip-flop)
(b) MRAM TAS based FPGA (2011)
(c) Perpendicular STT-MRAM with CMOS (logic functions)
(d) Full Non-volatile processor based on perpendicular STT-MRAM (on/off computing)







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