January 2022

SUNGWON  CHUNG
Neuralink Corporation

BIOGRAPHY

SungWon Chung is the Head of Brain Interfaces System-on-Chip at Neuralink Corporation where he is leading a chip design team to develop a high-bandwidth wireless brain computer interface. He received the Ph.D. degree in Electrical Engineering and Computer Science (EECS) from the Massachusetts Institute of Technology (MIT), Cambridge, Massachusetts, USA, in 2014, the M.S. degree in EECS from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2005, and the B.S. degree in Electronics Engineering with double major in Computer Engineering and minor in Mechanical Engineering from Pusan National University, Busan, Korea, in 2002.

His interests are in the broad range of integrated circuits and innovative system architectures for nanodevices exploiting diverse wave-matter interactions. His research contributions include the demonstration of the first scalable nanophotonic phased array using thermo-optic modulation in silicon-on-insulator CMOS with 1024 elements [2017 IEEE International Solid-State Circuits Conference (ISSCC), 2018 IEEE Journal of Solid-State Circuits], the first multi-gigabit mobile quantum communication receiver architecture [2017 IEEE Photonics Conference (IPC)], the first demonstration of ultrahigh-precision radio wave sampling circuits implemented with gallium-nitride high-electron mobility transistors [2016 IEEE Electron Device Letters (EDL)], a digital-intensive concurrent non-contiguous multiband wireless transmitter with the highest aggregate bandwidth [2015 IEEE Transactions on Microwave Theory and Techniques (TMTT)], the highest efficiency bulk-silicon microwave power amplifier architecture at the time of introduction [ 2012 IEEE Journal of Solid-State Circuits (JSSC)], low-power dynamic nonlinearity linearization using novel adaptive digital predistortion techniques [2009 IEEE Transactions on Circuits and Systems II (TCAS-II), 2008 IEEE Transactions on Microwave Theory and Techniques (TMTT)], and a machine learning co-processor architecture with analog cache memory for the low-overhead integration of instruction-level processing in-memory accelerator [2019 IEEE Journal of Emerging and Selected Topics in Circuits and Systems]. Prior to his appointment at Neuralink since 2019, he had held R&D positions for nine years in Mitsubishi Electric as Consultant, KITEL Company as Member of Technical Staff, University of Southern California as Research Associate and Visiting Scholar, MIT Microsystems Technology Laboratories as Postdoctoral Associate, and Intersil Corporation (acquired by Renesas Electronics) as Mixed-Signal Design Engineering Intern, while collaborating with Toyota, Bell Labs, Tower Semiconductor (acquired by Intel), and Samsung.

Dr. Chung serves on the Digital Signal Processing Technical Committee (MTT-9/DSPX) for IEEE Microwave Theory and Techniques Society (MTT-S) where he is co-organizing workshops for IEEE International Microwave Symposium (IMS) and IEEE Radio & Wireless Week (RWW).  He also serves on the Technical Program Committee of IEEE Custom Integrated Circuits Conference (CICC) and IEEE Radio Frequency Integrated Circuits Symposium (RFIC). He received IEEE Computer Society Lance Stafford Larson Outstanding Paper Award, USENIX Student Research Grant for a UNIX filesystem development, IEEE Radio & Wireless Week Best Paper Award, Samsung Electronics Thesis Award, and was nominated for IEEE International Microwave Symposium (IMS) Best Paper Award. He was a Viterbi Postdoctoral Fellow and a Presidential Scholar, and is a recipient of 2014 Outstanding Student Designer Award for excellence in integrated circuits design from Analog Devices. His research work on an energy-efficient microwave transmitter was commercialized by Eta Devices (acquired by Nokia Corporation) and recognized with 2015 Technology Pioneers Award by World Economic Forum (WEF) in Geneva, Switzerland. Dr. Chung and his two colleagues were awarded Bell Labs Prize for their work on large-scale nanophotonic phased arrays, which was live demonstrated in 2017 IEEE International Solid-State Circuits Conference (ISSCC) for 3D imaging, sensing, and wireless communication.  He has served on more than 200 review cases as a Reviewer of IEEE and OSA journals including IEEE Journal of Solid-State Circuits, IEEE Transactions on Microwave Theory and Techniques, IEEE Microwave and Wireless Component Letters, IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE Transactions on Signal Processing, IEEE Transactions on Sustainable Computing, IEEE Journal of Selected Topics in Quantum Electronics, IEEE/OSA Journal of Lightwave Technology, Optics Letters, Optical Materials Express, Optics Express, and Optica.  Dr. Chung served as a Guest Editor of 2019 IEEE Microwave Magazine Focused Issue on digital predistortion and postcorrection, and is currently an Editorial Review Board Member of IEEE Solid-State Circuits Letters and an Associate Editor of IEEE Transactions on Circuits and Systems I - Regular Papers.  He is a Member of OSA and a Senior Member of IEEE.

CONTACT

sungwon_at_IEEE_dot_org

SELECTED CONFERENCE WORKSHOP & SPECIAL SESSION (participation as a (co)-organizer/host)

1. Wideband and High Efficiency mm-Wave CMOS PA Design for 5G and Beyond,
   IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Denver, CO, June 2022.

2. Quantum Computing Circuit and System,
   Co-organizer: Jongseok Park (Intel Labs)
   IEEE Custom Integrated Circuits Conference (CICC), April, 2021.

3. Machine Learning and AI Techniques with Intelligent RF/mmWave Systems for Wireless Communication, Sensing, and Computation,
   Co-organizers: Markus Gardill (University of Würzburg, Germany), Young-Kai Chen (DARPA)
   IEEE MTT-S International Microwave Symposium (IMS) &
   IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, PA, June 2020.

4. Digital Pre-Distortion and Post-Correction from DC to mmWave for Wireline and Optical Communications,
   Co-organizers: Noriaki Kaneda (Bell Labs, Murray Hill, NJ), Hermann Boss (Rohde & Schwarz, Germany)
   IEEE MTT-S International Microwave Symposium (IMS) &
   IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Philadelphia, PA, June 2018.

5. RF-Inspired Silicon Photonics,
   IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Honolulu, Hawaii, June 2017.

6. Digital-Intensive Transmitters for 4G/5G Broadband Mobile Communications,
   Co-organizers: Rui Ma (Mitsubishi Electric Research Laboratories, Cambridge, MA)
   IEEE MTT-S International Microwave Symposium &
   IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Honolulu, Hawaii, June 2017.
   
   

SELECTED CONFERENCE WORKSHOP & SPECIAL SESSION (participation as an invited speaker)

1. A 2.4-GHz high-efficiency multilevel outphasing WLAN transmitter and an integration RF subsampling receiver for adaptive PA linearization,
   IEEE RFIC Workshop on High-Performance WLAN Transceiver Design and Calibration Techniques, Philadelphia, PA, June 2018.

2. Digital post-correction of nonlinearity with memory effects in GaN HEMT track-and-hold circuits,
   IEEE IMS/RFIC Workshop on Digital Pre-Distortion and Post-Correction from DC to mmWave for Wireline and Optical Communications, Philadelphia, PA, June 2018.

3. Digital post-correction of dynamic nonlinearity in GaN HEMT track-and-hold circuits for high performance ADCs,
   IEEE Radio & Wireless Week Workshop on Digital Pre-Distortion and Post-Correction from DC to RF and mm-Wave towards Optical Spectrum, Anaheim, California, Jan. 2018.

4. Monolithic optical phased arrays (delivered presentation and hosted the workshop on behalf of Prof. Hossein Hashemi),
   IEEE RFIC Workshop on RF-Inspired Silicon Photonics, Honolulu, Hawaii, June 2017.

5. Advanced power coding and non-contiguous concurrent multiband digital transmitter architectures,
   IEEE IMS/RFIC Workshop on Digital-Intensive Transmitters for 4G/5G Broadband Mobile Communications, Honolulu, Hawaii, June 2017.

SELECTED PUBLICATIONS IN PEER-REVIEWED JOURNALS

1. Tightly coupled machine learning coprocessor architecture with analog in-memory computing for instruction-level acceleration,
   SungWon Chung and Jiemi Wang,
   IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol. 9, no. 3, pp. 544-561, Sept. 2019.
   DOI: 10.1109/JETCAS.2019.2934929

2. Ubiquitous Digital Predistortion and Postcorrection,
   SungWon Chung and Hermann Boss,
   IEEE Microwave Magazine, vol. 20, no. 5, pp. 20-25, May 2019.
   DOI: 10.1109/MMM.2019.2898062

3. Low-power thermo-optic silicon modulator for large-scale photonic integrated systems,
   SungWon Chung, Makoto Nakai, and Hossein Hashemi,
   Optics Express, vol. 27, no. 9, pp. 13430-13459, Apr. 2019.
   DOI: 10.1364/OE.27.013430

4. A monolithically integrated large-scale optical phased array in silicon-on-insulator CMOS,
   SungWon Chung, Hooman Abediasl, and Hossein Hashemi,
   IEEE Journal of Solid-State Circuits (JSSC), vol. 53, no. 1, pp. 275-296, Jan. 2018. Special Issue on the 2017 IEEE International Solid-State Circuits Conference
   DOI: 10.1109/JSSC.2017.2757009

5. A compact operational amplifier with load-insensitive stability compensation for high-precision transducer interface,
   Zhanghao Yu, Xi Yang, and SungWon Chung,
   Sensors, vol. 18, no. 2, pp. 1-22, Jan. 2018.
   DOI: 10.3390/s18020393

6. GaN high electron mobility transistor track-and-hold sampler with over 100-dB signal-to-noise ratio,
   Puneet Srivastava, SungWon Chung, Daniel Piedra, Hae-Seung Lee, and Tomás Palacios,
   IEEE Electron Device Letters (EDL), vol. 37, no. 10, pp. 1314-1317, Oct. 2016.  Selected as one of the EDL Editors' Picks
   DOI: 10.1109/LED.2016.2598806 

7. Design considerations on wideband envelope termination for high efficiency RF power amplifiers,
   SungWon Chung, Rui Ma, and Koon Hoo Teo,
   Electronics Letters (EL), vol. 52, no. 6, pp. 460-462, Feb. 2016.
   DOI: 10.1049/el.2015.4328

8. Concurrent multiband digital outphasing transmitter architecture using multidimensional power coding,
   SungWon Chung, Rui Ma, Shintaro Shinjo, Hideyuki Nakamizo, Kieran Parsons Parsons, and Koon Hoo Teo,
   IEEE Transactions on Microwave Theory and Techniques (TMTT), vol. 63, no. 2, pp. 598-613, Feb. 2015.
   DOI: 10.1109/TMTT.2014.2387845

9. A 2.4-GHz 27-dBm asymmetric multilevel outphasing power amplifier in 65-nm CMOS,
   Philip A. Godoy, SungWon Chung, Taylor W. Barton, and Joel L. Dawson,
   IEEE Journal of Solid-State Circuits (JSSC), vol. 47, no. 10, pp. 2372-2384, Oct. 2012.
   DOI: 10.1109/JSSC.2012.2202810

10. Digitally assisted feedforward compensation of Cartesian feedback power amplifier systems,
    Hyun H. Boo, SungWon Chung, and Joel L. Dawson,
    IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 58, no. 8, pp. 457-461, Aug. 2011.
    DOI: 10.1109/TCSII.2011.2158274

11. Adaptive predistortion using a delta-sigma modulator for automatic inversion of power amplifier nonlinearity,
    Hyun H. Boo, SungWon Chung, and Joel L. Dawson,
    IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 56, no. 12, pp. 901-905, Dec. 2009.
    DOI: 10.1109/TCSII.2009.2035269

12. Energy-efficient digital predistortion with lookup table training using analog Cartesian feedback,
    SungWon Chung, Jack. W. Holloway, and Joel L. Dawson,
    IEEE Transactions on Microwave Theory and Techniques (TMTT), vol. 56, no. 10, pp. 2248-2258, Oct. 2008.
    DOI: 10.1109/TMTT.2008.2003139

SELECTED PUBLICATIONS IN PEER-REVIEWED CONFERENCE PROCEEDINGS

1. A 1024-channel simultaneous recording neural SoC with stimulation and real-time spike detection,
   Do-Yeon Yoon, Sonal Pinto, SungWon Chung, Paul Merolla, Thong-Wei Koh, and Dongjin Seo,
   in 2021 IEEE Symposium on VLSI Circuits (VLSIC), pp. 1-2, June 2021.
   DOI: 10.23919/VLSICircuits52068.2021.9492480

2. Optical phased array FMCW lidar with on-chip calibration,
   SungWon Chung, Makoto Nakai, Samer Idres, Yongwei Ni, and Hossein Hashemi,
   in 2021 IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, pp. 286-287, Feb. 2021.
   DOI: 10.1109/ISSCC42613.2021.9366004

3. Low-power thermo-optic silicon modulator geometrically optimized for photonic integrated circuits
   Makoto Nakai, SungWon Chung, and Hossein Hashemi,
   in 2020 Conference on Lasers and Electro-Optics (CLEO), pp. 1-2.

4. Noise cancellation in multi-band digital-intensive transmitters
   SungWon Chung and Rui Ma,
   in 2018 Asia-Pacific Microwave Conference (APMC), pp. 771-773.
   DOI: 10.23919/APMC.2018.8617217

5. Extending modulation bandwidth of SOI thermo-optic phase shifters through digital pre-emphasis,
   SungWon Chung and Hossein Hashemi,
   in 2018 Conference on Lasers and Electro-Optics (CLEO), pp. 1-2.
   DOI: 10.1364/CLEO_AT.2018.JW2A.15

6. Geometric loss reduction in tight bent waveguides for silicon photonics,
   Makoto Nakai, Tsuyoshi Nomura, SungWon Chung, and Hossein Hashemi,
   in 2018 Conference on Lasers and Electro-Optics (CLEO), pp. 1-2.
   DOI: 10.1364/CLEO_AT.2018.JW2A.70

7. Poly-crystalline silicon waveguide devices on hollow deep trench isolation in standard foundry bulk silicon process,
   SungWon Chung, Makoto Nakai, Edward Preisler, and Hossein Hashemi,
   in 2018 Optical Fiber Communication Conference and Exhibition (OFC), pp. 1-3.
   DOI: 10.1364/OFC.2018.Th2A.2

8. A concurrent triple-band digital transmitter using feedforward noise cancellation for delta-sigma modulation,
   SungWon Chung, Rui Ma, Shintaro Shinjo, Koji Yamanaka, and Koon Hoo Teo,
   in 2017 European Microwave Conference (EuMC), pp. 1140-1143.
   DOI: 10.23919/EuMC.2017.8231049

9. Performance limit of monolithically integrated Gaussian modulated coherent states quantum key distribution receiver in silicon-on-insulator CMOS,
   SungWon Chung, Abhilash Ravindranath, and Xi Yang,
   in 2017 IEEE Photonics Conference (IPC), pp. 131-132.
   DOI: 10.1109/IPCon.2017.8116036

10. Digital post-correction on dynamic nonlinearity in GaN HEMT track-and-hold sampling circuits,
    SungWon Chung, Puneet Srivastava, Xi Yang, Tomás Palacios, and Hae-Seung Lee,
    in 2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), pp. 190-193.
    DOI: 10.1109/CSICS.2017.8240420

11. A 1024-element scalable optical phased array on 0.18um SOI CMOS,
    SungWon Chung, Hooman Abediasl, and Hossein Hashemi,
    in 2017 IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, pp. 262-263, Feb. 2017.
    DOI: 10.1109/ISSCC.2017.7870361

12. Design of broadband three-way sequential power amplifiers,
    Jin Shao, Rui Ma, Shintaro Shinjo, SungWon Chung, and Koon Hoo Teo,
    in Proceedings of 2016 IEEE Radio-Frequency Integration Technology (RFIT), pp. 1-3, Aug. 2016.
    DOI:  10.1109/RFIT.2016.7578196

13. A 200-MS/s 98-dB SNR track-and-hold in 0.25-um GaN HEMT,
    SungWon Chung and Hae-Seung Lee,
    in Proceedings of 2015 IEEE Custom Integrated Circuits Conference (CICC), pp. 1-4, Sept. 2015.
    DOI: 10.1109/CICC.2015.7338405

14. Inter-band carrier aggregation digital transmitter architecture with concurrent multi-band delta-sigma modulation using out-of-band noise cancellation,
    SungWon Chung, Rui Ma, Shintaro Shinjo, and Koon Hoo Teo,
    in Proceedings of 2015 IEEE MTT-S International Microwave Symposium (IMS), pp. 1-4, May 2015.
    DOI: 10.1109/MWSYM.2015.7166934

15. Outphasing multi-level RF-PWM signals for inter-band carrier aggregation in digital transmitters,
    SungWon Chung, Rui Ma, Koon Hoo Teo, and Kieran Parsons,
    in Proceedings of 2015 IEEE Radio and Wireless Symposium (RWS), pp. 212-214, Jan. 2015.
    DOI: 10.1109/RWS.2015.7129769

16. A 12-bit resolution, 200-MSample/second phase modulator for a 2.5 GHz carrier with discrete carrier pre-rotation in 65nm CMOS,
    Taylor W. Barton, SungWon Chung, Philip A. Godoy, and Joel L. Dawson,
    in 2011 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Digest of Papers, pp. 1-4, June 2011.
    DOI: 10.1109/RFIC.2011.5940597

17. A 2.5-GHz asymmetric multilevel outphasing power amplifier in 65-nm CMOS,
    Philip A. Godoy, SungWon Chung, Taylor W. Barton, David J. Perreault, and Joel L. Dawson,
    in Proceedings of 2011 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications (PAWR), pp. 1-4, Jan. 2011.
    DOI: 10.1109/MWSYM.2011.5972660

18. A highly efficient 1.95-GHz, 18-W asymmetric multilevel outphasing transmitter for wideband applications,
    Philip A. Godoy, SungWon Chung, Taylor W. Barton, David J. Perreault, and Joel L. Dawson,
    in Proceedings of 2011 IEEE MTT-S International Microwave Symposium (IMS), pp. 1-4, June 2011.
    DOI: 10.1109/PAWR.2011.5725372

19. Digital predistortion using quadrature delta-sigma modulation with fast adaptation for WLAN power amplifiers,
    SungWon Chung and Joel L. Dawson,
    in Proceedings of 2011 IEEE MTT-S International Microwave Symposium (IMS), pp. 1-4, June 2011.
    DOI: 10.1109/MWSYM.2011.5972929

20. Asymmetric multilevel outphasing transmitter using class-E PAs with discrete pulse width modulation,
    SungWon Chung, Philip A. Godoy, Taylor W. Barton, David J. Perreault, and Joel L. Dawson,
    in Proceedings of 2010 IEEE MTT-S International Microwave Symposium (IMS), pp. 264-267, May 2010.
    DOI: 10.1109/MWSYM.2010.5514707

21. A 73.1 dB SNDR digitally assisted subsampler for RF power amplifier linearization systems,
    SungWon Chung, and Joel L. Dawson,
    in 2009 IEEE Symposium on VLSI Circuits (VLSIC) Digest of Technical Papers, pp. 148-149, June 2009.

22. Asymmetric multilevel outphasing architecture for multi-standard transmitters,
    SungWon Chung, Phlip A. Godoy, Taylor W. Barton, Everest W. Huang, David J. Perreault, and Joel L. Dawson,
    in 2009 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Digest of Papers, pp. 237-240, June 2009.
    DOI: 10.1109/RFIC.2009.5135530

23. Open-loop digital predistortion using Cartesian feedback for adaptive RF power amplifier linearization,
    SungWon Chung, Jack W. Holloway, and Joel L. Dawson,
    in Proceedings of 2007 IEEE MTT-S International Microwave Symposium (IMS), pp. 1449-1452, June 2007.
    DOI: 10.1109/MWSYM.2007.380506

24. A low-power 8-bit microcontroller for sensor node,
    Young-Woo Park, Woo-Min Hwang, SungWon Chung, and Kyu Ho Park,
    in Proceedings of 2005 International SoC Design Conference (ISOCC), pp. 608-609, Oct. 2005.

25. A UWB radio system architecture using mixed-mode memory,
    SungWon Chung, Woo-Min Hwang, Young-Woo Park, and Kyu Ho Park,
    in Proceedings of 2005 IEEE Symposium on Low-Power and High-Performance Chips (COOL Chips VIII), p. 193, 2005.

26. An energy-efficient OFDM ultra-wideband digital radio architecture,
    SungWon Chung and Kyu Ho Park,
    in Proceedings of 2004 IEEE Workshop on Signal Processing Systems (SiPS), pp. 211-216, Oct. 2004.
    DOI: 10.1109/SIPS.2004.1363051

27. OFDM symbol shaping for reducing D/A requantization error in multiband UWB systems,
    SungWon Chung and Kyu Ho Park,
    in Proceedings of 2004 IEEE Vehicular Technology Conference (VTC Fall), vol. 7, pp. 5026-5030, Sept. 2004.
    DOI: 10.1109/VETECF.2004.1405055

28. Wideband impedance matching of integrated antennas and CMOS low noise amplifiers for a multi-band UWB receiver,
    SungWon Chung, Seung-Yoon Lee, and Kyu Ho Park,
    inProceedings of 2004 IEEE Radio and Wireless Conference (RAWCON), pp. 131-134, Sept. 2004.
    DOI: 10.1109/RAWCON.2004.1389090

29. A 3.1-4.8 GHz low noise amplifier in 0.18-um CMOS for 802.15.3a UWB receivers,
    SungWon Chung, Seung-Yoon Lee, and Kyu Ho Park,
    in Proceedings of 2004 International SoC Design Conference (ISOCC), pp. 51-52, 2004.

30. Performance analysis of IEEE P802.15.3a multi-band UWB transceiver for DAC quantization error in fading channel,
    SungWon Chung, Seung-Yoon Lee, and Kyu Ho Park,
    in Proceedings of 2003 IEEK Conference, vol. 26, no. 2, pp. 216-219, Nov. 2003.

MANUSCRIPTS IN PREPARATION

1. with Peicheng Liao, Hooman Abediasl, Allan Willner, and Hossein Hashemi, Topic: Silicon photonics

2. with Puneet Srivastava, Xi Yang, Tomás Palacios, and Hae-Seung Lee, Topic: Sampling circuits

3. with Rui Ma, Shintaro Shinjo, and Koon Hoo Teo, Topic: Digital transmitters

4. with Philip A. Godoy, Hae-Seung Lee, Anantha P. Chandrakasan, and Joel L. Dawdon, Topic: CMOS RF power amplifier nonlinearity

5. with Pierre Busson, Topic: Wireless propagation loss with low-power RF communication over tissue

SELECTED PATENT PUBLICATIONS

1. Hossein Hashemi, SungWon Chung, and Hooman Abediasl, Monolithically integrated large-scale optical phased array, US Patent 10,656,496 B2, May 19, 2020. Assignee: University of Southern California

2. Hossein Hashemi, SungWon Chung, and Hooman Abediasl, Two-dimensional optical phased array, US Patent 10,634,973 B2. Assignee: University of Southern California

3. Rui Ma, SungWon Chung, and Koon Hoo Teo, Inter-band CA digital transmitter with multi-stage out-of-band noise canceller, US Patent 9,985,667 B2, May 29, 2018. Assignee: Mitsubishi Electric Research Laboratories

4. Rui Ma, SungWon Chung, and Koon Hoo Teo, Wideband self-envelope tracking RF power amplifier, US Patent 9,780,730 B2, Oct. 3, 2017. Assignee: Mitsubishi Electric Research Laboratories

5. Rui Ma, SungWon Chung, and Koon Hoo Teo, System and method for generating multi-band signal, US Patent 9,294,079 B2, Mar. 22, 2016. Assignee: Mitsubishi Electric Research Laboratories [ pdf ]

6. Rui Ma, SungWon Chung, and Koon Hoo Teo, Output matching network for wideband power amplifier with harmonic suppression, US Patent 9,231,550 B2, Jan. 5, 2016. Assignee: Mitsubishi Electric Research Laboratories  [ pdf ]

7. Joel L. Dawson, David J. Perreault, SungWon Chung, Philip Godoy, and Everest Huang, Asymmetric multilevel outphasing architecture for RF amplifiers; 3rd rev. (33 claims), US Patent 8,957,727 B2, Feb. 17, 2015. Assignee: Massachusetts Institute of Technology [ pdf ]

8. Joel L. Dawson, David J. Perreault, SungWon Chung, Philip Godoy, and Everest Huang, Asymmetric multilevel outphasing architecture for RF amplifiers; 2nd rev. (11 claims), US Patent 8,659,353 B2, Feb. 25, 2014. Assignee: Massachusetts Institute of Technology [ pdf ]

9. Joel L. Dawson, David J. Perreault, SungWon Chung, Philip Godoy, and Everest Huang, Asymmetric multilevel outphasing architecture for RF amplifiers; 1st rev. (12 claims), US Patent 8,164,384 B2, Apr. 24, 2012. Assignee: Massachusetts Institute of Technology [ pdf ]

10. Joel L. Dawson, David J. Perreault, SungWon Chung, Philip Godoy, and Everest Huang, Asymmetric multilevel outphasing architecture for RF amplifiers; 1st pub. (18 claims), US Patent 8,026,763 B2, Sept. 27, 2011. Assignee: Massachusetts Institute of Technology [ pdf ]

11. SungWon Chung, Seung-Yoon Lee, and Kyu-Ho Park, Mixed-mode semiconductor memory, US Patent 7,315,267 B2, Jan. 1, 2008. Assignee: Korea Advanced Institute of Science and Technology [ pdf ]