Dr. Sudip Ghosh

Area of Interest :

FPGA and SoC based design & implementation of signal processing algorithms.
Digital Image and Video Watermarking systems design.
Logic Synthesis and Verification of digital circuits.
VLSI Testing.
Computer architecture development for security applications.

I am currently working as an Assistant Professor at School of VLSI Technology (SOVT) at "Indian Institute of Engineering Science and Technology (IIEST), Shibpur, Howrah, West Bengal, India (Formerly: Bengal Engineering and Science University, Shibpur (BESUS), Howrah, West Bengal, India)". I introduce myself as Sudip Ghosh, born in Kolkata, India, graduated in B.E. (Electronics & Communication Engineering) from Sikkim Manipal Institute of Technology (SMIT), Sikkim, India in August 2001 under the University of Sikkim Manipal University of Health, Medical And Technological Sciences (SMUHMTS) and worked at Saha Institute of Nuclear Physics (SINP), (An autonomous R&D organization under Department of Atomic Energy,Government of India) Kolkata, India as a Temporary Project Staff from January to July 2002 in the Microelectronic Division. I have completed my post graduation degree MS in VLSI CAD in May 2005 from Manipal School of Information Sciences(SOIS) (Formerly known as: Manipal Centre For Information Science (MCIS), Manipal, India) in the year 2005 under the University of Manipal, India and for the partial fulfillment of the masters degree, I have done my project for the last two semester of the 4-semester degree course, at Indian Statistical Institute (ISI), (R&D Organization under Government of India), Kolkata from August 2004 to April 2005. I joined as a full-time Project-Linked scholar at Ganapati Sengupta VLSI Laboratory at Bengal Engineering and Science University, Shibpur (BESUS) from 12th August 2005 with a university scholarship. Currently I am working as a full-time Assistant Professor at School of VLSI Technology (SOVT) at "Indian Institute of Engineering Science and Technology (IIEST), Shibpur, Howrah, West Bengal, India (Formerly: Bengal Engineering and Science University, Shibpur (BESUS), Howrah, West Bengal, India)" from 10th April 2008. I defended my Ph.D. thesis in Engineering on 15th February 2017 at IIEST Shibpur and obtained the Ph.D. degree on Saturday, 4th March 2017 at the 3rd convocation of IIEST Shibpur.

Associations

Senior Member, IEEE

VSI (VLSI Society of India)

CSI (Computer Society of India)

IAENG (International Association of Engineers)

List of Publications in Journals and Conferences

CONFERENCES

2006

[1] Nachiketa Das, Sudip Ghosh and H.Rahaman. “Detection of Single Stuck-at and Bridging Faults in Cluster Based FPGA architectures”, in IEE national seminar EEDP-2006 on 12th March, 2006 at JIS College of Engineering, Kalyani, West Bengal, India.

2007

[2] Somsubhra Talapatra, Sudip Ghosh, C.Roychaudhuri, Biplab K. Sikdar and Hafizur Rahaman. “FPGA based Design and Implementation of Neural Network Compensators for Nanocrystalline MEMS pressure sensor” in VSI, TEQIP, DIT sponsored national conference on Design Techniques for modern electronic devices, VLSI and Communication Systems (DTVC- 2007) from 14th -15th May, 2007 at NIT Hamirpur, Himachal Pradesh, India. pp. 183-188.

url: http://vlsi-india.org/vsi/photos/2007/dtvc07/index.html

[3] Nachiketa Das, Sudip Ghosh and H.Rahaman. “Detection of Single Stuck-at and Bridging Faults in Cluster-based FPGA Architectures” in 11th IEEE International Symposium on VLSI Design and Test (VDAT- 2007) from 8th –11th August, 2007 at Saha Institute of Nuclear Physics (SINP), Kolkata, India. pp. 205-212.

url: http://vlsi-india.org/vsi/download/vdat-abs/vdat2007-abstract.pdf

2009

[4] Sudip Ghosh, Pranab Ray, Santi P Maity and Hafizur Rahaman “Spread Spectrum Image Watermarking with Digital Design” in IEEE International Advance Computing Conference(IACC 2009) from 6-7 March 2009 at Thapar University, Patiala, India. pp. 868 – 873.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=4809129

2010

[5] Sudip Ghosh, Somsubhra Talapatra, Santi P Maity and Hafizur Rahaman “A Novel VLSI Architecture for Walsh-Hadamard Transform” in IEEE 2nd Asia Symposium on Quality Electronic Design (ASQED-2010) from 3-4 August, 2010 at Penang, Malaysia. pp. 146 – 150.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&;arnumber=5548230

2012

[6] Sudip Ghosh, Somsubhra Talapatra, Debasish Mondal, Navonil Chatterjee, Hafizur Rahaman and Santi P Maity, “VLSI Architecture for Spatial Domain Spread Spectrum Image Watermarking using Gray-Scale Watermark”, in 16th International Symposium on VLSI Design and Test (VDAT, 2012) from 1-4 July 2012 at Bengal Engineering and Science University, Shibpur, India. pp. 375-376. (Springer, LNCS)

Url: http://dx.doi.org/10.1007/978-3-642-31494-0_49

[7] Sudip Ghosh, Somsubhra Talapatra, Debasish Mondal, Navonil Chatterjee, Hafizur Rahaman and Santi P Maity, “VLSI Architecture for Spread Spectrum Image Watermarking using BinaryWatermark” in IEEE, International Conference on Advances in Computing and Communications(ICACC), from 9-11August 2012 at Rajagiri School of Engineering & Technology, Cochin, Kerala, India 2012. pp. 166 - 169.

url: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6305580

[8] Sudip Ghosh, Somsubhra Talapatra, Jayasree Sharma, Navonil Chatterjee, Hafizur Rahaman and Santi P Maity, “Dual Mode VLSI Architecture for Spread Spectrum Image Watermarking using Binary Watermark” in 2nd International Conference on Communication, Computing & Security (ICCCS-2012) from 6-8 October 2012 at National Institute of Technology Rourkela, India. pp. 784-791.

url: http://dx.doi.org/10.1016/j.protcy.2012.10.095

[9] Sudip Ghosh, Somsubhra Talapatra, Sudipta Chakraborty, Navonil Chatterjee, Hafizur Rahaman and Santi P Maity, “VLSI Architecture for Spread Spectrum Image Watermarking in Walsh-Hadamard Transform Domain using Binary Watermark” in 3rd IEEE International Conference on Computer and Communication Technology ( ICCCT 2012) from 23-25 November 2012, at Motilal Nehru National Institute of Technology(MNNIT), Allahabad, India, pp. 233-238.

url: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6394703

2013

[10] Sudip Ghosh, Somsubhra Talapatra, Navonil Chatterjee,Nagakumar Reddy, Santi P Maity and Hafizur Rahaman, “Multiplier-less VLSI Architecture of 1-D HilbertTransform pair using Biorthogonal Wavelets” in 2nd IEEE International Conference of Informatics, Electronics & Vision (ICIEV 2013) from 17-18 May 2013, at University of Dhaka, Bangladesh. pp. 1 - 6.

url: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6572716

[11] Sudip Ghosh, Santi P. Maity and Hafizur Rahaman, “Multiplier-less VLSI Architecture of 1-D Hilbert Transform pair using Biorthogonal Wavelets for QCM-SS image Watermarking”, in 4th IEEE International Conference on Computer and Communication Technology (ICCCT- 2013 ) from 20th -22nd September 2013, at Motilal Nehru National Institute of Technology(MNNIT), Allahabad, India. pp. 5-10.

url: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6749594

[12] Sudip Ghosh, Bijoy Kundu,Debopam Datta, Santi P Maity and Hafizur Rahaman “Design and Implementation of Fast FPGA based Architecture for Reversible Watermarking” in IEEE International Conference on Electrical Information and Communication Technology (EICT-2013) from 19-21 December 2013, at Khulna University of Engineering and Technology (KUET), Khulna, Bangladesh. pp.1-6.

url: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6777819

2014

[13] Sudip Ghosh, Arijit Biswas, Santi P Maity and Hafizur Rahaman " Hadamard Walsh and Paley Ordered DFWHT: A Study and Implementation on FPGA" in IEEE CALCON 2014 National Conference on Electrical, Electronics, and Computer Engineering (A Triennial Event of IEEE Kolkata Section) from November 7-8, 2014 at Hotel Park Prime Kolkata,India , ISBN 978-93-833-0383-0

[14] Sudip Ghosh, Nachiketa Das, Subhajit Das,Santi P Maity and Hafizur Rahaman "FPGA and SoC Based VLSI Architecture of Reversible Watermarking Using Rhombus Interpolation By Difference Expansion" in 11th IEEE India Conference INDICON 2014 from 11th to 13th December 2014 at Yashada,Pune,India. pp. 1-6.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7030612

[15] Sudip Ghosh, Arijit Biswas,Santi P Maity and Hafizur Rahaman "Design of A Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA" in 5th IEEE International Symposium on Electronic System Design (ISED 2014) from December 15 - 17, 2014 at NIT Surathkal, Mangalore, India. pp. 68-72.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7172749

[16] Sudip Ghosh, Arijit Biswas, Santi P Maity and Hafizur Rahaman "Design of an Improved Algorithm for Blind Digital Image Watermarking Using Both Grayscale and Binary Watermark in DFWHT Domain" in 8th IEEE International Conference on Electrical and Computer Engineering (ICECE 2014) from 20-22 December 2014 at Pan Pacific Sonargaon, Dhaka, Bangladesh. pp. 112-115.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7026944

[17] Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi P Maity and Hafizur Rahaman" Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion using FPGA" in 13th IEEE International Conference on Information Technology (ICIT 2014) from 22nd -24th December, 2014 at Bhubaneswar, Orrisa, India. pp. 123-128.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7033308

2015

[18] Sudip Ghosh,Subhojit Chatterjee, Santi P Maity and Hafizur Rahaman "A New Algorithm On Wavelet Based Robust Invisible Digital Image Watermarking for Multimedia Security" in International Conference on Electronic Design, Computer Networks & Automated Verification (EDCAV 2015) from 29-30th January 2015 at Shillong,NIT Meghalaya, India. pp. 72-77.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7060542

[19] Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi P Maity and Hafizur Rahaman " An Adaptive Feedback based Reversible Watermarking Algorithm using Difference Expansion" in IEEE 2nd International Conference on Recent Trends in Information Systems (RETIS 2015) from 9-11 July 2015 at Jadavpur University, Kolkata, India.pp. 207-212.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7232879

[20] Sudip Ghosh, Sayandip De, Santi Prasad Maity and Hafizur Rahaman "A Novel Dual Purpose Spatial Domain Algorithm for Digital Image Watermarking and Cryptography Using Extended Hamming Code" in 2nd IEEE International Conference on Electrical Information and Communication Technologies (EICT-2015) from 10-12 December 2015 at Khulna University of Engineering and Technology (KUET), Khulna, Bangladesh. pp. 167-172.

url: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?&arnumber=7391940

[21] Sudip Ghosh, Sambaran Hazra, Santi P Maity and Hafizur Rahaman "A New Algorithm for Grayscale Image Histogram Computation" in 12th IEEE India International Conference (INDICON) 2015 from 17-20 December 2015 at Jamia Millia Islamia, New Delhi, India. pp. 1-6.

url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7443463

2016

[22] Subrata Das., Parthasarathi Dasgupta, Petr Fiser, Sudip Ghosh and Debesh Kumar Das "A Rule-Based Approach for Minimizing Power Dissipation of Digital Circuits" in 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) from April 20-22, 2016, at Košice, Slovakia, Europe. pp. 1-6.

url : http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=7482470

[23] Sambaran Hazra, Sudip Ghosh, Santi P. Maity, Hafizur Rahaman "New FPGA and Programmable SoC Based VLSI Architecture for Histogram Generation of Grayscale Images for Image Processing Applications" in 6th International Conference On Advances In Computing & Communications, ICACC 2016, 6-8 September 2016, Cochin, India. vol. 93, Pp. 139–145.

url :http://dx.doi.org/10.1016/j.procs.2016.07.193

2017

[24] Sudip Ghosh, Supriya Das, "A New Spatial Domain Invisible Blind Image Watermarking Algorithm For Copyright Protection" in Prof. Lotfi A. Zadeh memorial 6th international conference on 'Computing , Communication and Sensor Network", CCSN-2017, in Kolkata, India. Vol- I, ISBN : 81-85824-46-0.

2018

[25] Laxmidhar Biswal, Rakesh Das, Anirban Bhattacharjee, Sudip Ghosh and Hafizur Rahaman, "Clifford+ T-based Quantum High Speed Multiplier" in 1st International Symposium on Devices, Circuits and Systems, March 29-31, ISDCS 2018 at IIEST Shibpur, India. pp. 1-7 doi: 10.1109/ISDCS.2018.8379682

URL: https://ieeexplore.ieee.org/abstract/document/8379682/

[26] Laxmidhar Biswal, Anirban Bhattacharjee, Sudip Ghosh and Hafizur Rahaman, "Implementation of Nearest Neighbor Quantum Circuit with Low Quantum Cost", March 29-31, ISDCS 2018 at IIEST Shibpur, India. pp. 1-6 doi: 10.1109/ISDCS.2018.8379674

URL: https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=8379674

2020

[27] Laxmidhar Biswal, Chandan Bandyopadhyay, Sudip Ghosh and Hafizur Rahaman, "Fault-tolerant Implementation of Quantum-Arithmetic and Logical Unit (Q-ALU) using Clifford+T-group", January 13-15, COMSYS 2020 at Jalpaiguri Government Engineering College, India. url: https://jgec.ac.in/comsys2020/

URL: link.springer.com/chapter/10.1007%2F978-981-15-7834-2_78

[28] Joshua Roy Palathinkal, Yuvam Bhateja, Sudip Ghosh and Hafizur Rahaman, "A New Blind Invisible and Semi-Fragile Colour Image Watermarking Scheme in Spatial Domain", 2020 International Symposium on Devices, Circuits and Systems (ISDCS), at IIEST Shibpur, India, 4-6th March 2020.

URL: https://ieeexplore.ieee.org/document/9263020

[29] Shivdeep, Sudip Ghosh, Hafizur Rahaman, "A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation", International Symposium on Devices, Circuits and Systems (ISDCS), at IIEST Shibpur. India, 4-6th March 2020 url: http://isdcs.iiests.ac.in/

URL: https://ieeexplore.ieee.org/document/9263003

[30] Shivdeep, Sudip Ghosh, Prasun Ghosal , Santi Prasad Maity, Hafizur Rahaman, “PEE Based Reversible Watermarking Algorithm for Authentication and Security of Medical Images, TENSYMP 2020, 2020 IEEE Region 10 Symposium (TENSYMP), 5-7 June 2020, Dhaka, Bangladesh.

URL: https://ieeexplore.ieee.org/document/9230851

[31] Shivdeep, Ankur Biswas, Sudip Ghosh, Tridibesh Nag, Santi P Maity and Hafizur Rahaman, "HLS Based Implementation of Modified DE-RIW Algorithm on FPGA and P-SoC", IEEE International Conference for Convergence in Engineering (ICCE) , 5-6, September 2020 at Science City kolkata.

URL: https://ieeexplore.ieee.org/abstract/document/9290711

[32] Shivdeep, Sudip Ghosh, Tridibesh Nag, Santi P Maity and Hafizur Rahaman "Reversible Color Image Watermarking Algorithm using Reverse Contrast Mapping", IEEE International Conference for Convergence in Engineering (ICCE), 5-6, September 2020 at Science City kolkata.

URL: https://ieeexplore.ieee.org/abstract/document/9290684

2022

[33] Aishi Pramanik, Aniket Banerjee, Dhrupadi Das, Debashis De and Sudip Ghosh,"Medical Image Security Using RIW For Gray-Scale and Color Images",7th International Conference on Emerging Applications of Information Technology(EAIT), March 30-31, 2022, Springer. In: Mandal, J.K., De, D. (eds) Frontiers of ICT in Healthcare . Lecture Notes in Networks and Systems, vol 519. Springer, Singapore.

URL: https://doi.org/10.1007/978-981-19-5191-6_47

[34] Soumen Bhowmick, Debashis De and Sudip Ghosh,"Healthcare Security of Patient's Medical Images by PEE based RIW without Location mapping", 7th International Conference on Emerging Applications of Information Technology (EAIT), March 30-31, 2022, Springer. In: Mandal, J.K., De, D. (eds) Frontiers of ICT in Healthcare . Lecture Notes in Networks and Systems, vol 519. Springer, Singapore.

URL: https://doi.org/10.1007/978-981-19-5191-6_54

[35] Shubham Kumar, A. Bhattacharjee, S. Ghosh and H. Rahaman, "A Novel 2D Mapping Scheme for Nearest Neighbor Design of Quantum Circuits," 2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON), Kolkata, India, 2022, pp. 210-216, doi: 10.1109/EDKCON56221.2022.10032881.

URL: https://ieeexplore.ieee.org/document/10032881

[36] Rupam Sardar, Arkapravo Nandi, Aishi Pramanik, Soumen Bhowmick, De Debashis, Sudip Ghosh & Hafizur Rahaman, "Artificial Neural Network Design for CMOS NAND Gate Using Sigmoid Function." in the International Conference on Intelligent Systems and Human Machine Collaboration (ICISHMC) 2022 on 8TH JULY - 9TH JULY 2022. In: Bhattacharyya, S., Koeppen, M., De, D., Piuri, V. (eds) Intelligent Systems and Human Machine Collaboration. Lecture Notes in Electrical Engineering, vol 985. Springer, Singapore.

URL: https://doi.org/10.1007/978-981-19-8477-8_9

2023

[37] Rupam Sardar, Arkapravo Nandi, Avijit Bhowmik, Bimal Dutta, Sudip Ghosh, "Design of EX-OR Gate with ANN using Sigmoid and Relu Functions for Artificial Intelligence Applications in Python", in International Conference on Data Analytics and Insights (ICDAI 2023), organized by Techno International, Kolkata, India, during May 11–13, 2023.

URL: https://link.springer.com/book/9789819938797

[38] Rounak Roy, Sudip Ghosh and Hafizur Rahaman, "Implementation of Area Efficient Adders for Inexact Computing", in 2023 International Symposium on Devices, Circuits and Systems (ISDCS), Higashihiroshima, Japan, 2023, pp. 01-04. doi: 10.1109/ISDCS58735.2023.10153518.

URL: https://ieeexplore.ieee.org/document/10153518

[39] Anchit Arun, Ananya Chakraborty, Priyanka Dutta, Debajyoti Pal, Tridibesh Nag, Debasis De, Sudip Ghosh, Hafizur Rahaman: "Power and Delay Efficient Hardware Implementation with ATPG for Vedic Multiplier Using Urdhva Tiryagbhyam Sutra". IAIT 2023: 23:1-23:6 Thailand

URL: https://doi.org/10.1145/3628454.3631153

[40] Piyali Saha, Sudip Ghosh, Debajyoti Pal, Hafizur Rahaman: "Hardware Performance Analysis of N-bit CLA on FPGA and Programmable SoC". IAIT 2023: 1:1-1:7 Thailand

URL: https://doi.org/10.1145/3628454.3628455

2024

[41] Rupam Sardar, Debashis De, Avijit Bhowmick, Sudip Ghosh, Bimal Dutta, "Weather Prediction using Multi-linear Regression Model in North Twenty four Parganas", 8th International Conference on Emerging Applications of Information Technology (EAIT) 2024.

Books & Book Chapters

2017

[1.] Sudip Ghosh, Hafizur Rahaman, Santi Prasad Maity, "Digital Image Watermarking : Implementation On FPGA & Programmable SoC ", ISBN: 978-620-2-01656-8, LAP LAMBERT Publisher, Germany.

2024

[2.] ArkaPravo Nandi, Sudip Ghosh, Suman Lata Tripathi, Piyali Saha, Aishi Pramanik, Raju Hazari, Hafizur Rahaman "Prediction Models for Detecting COVID-19 from Chest X-ray Images using Multi-Layer Convolutional Neural Network", IOP Science

JOURNALS

2012

[1] Sudip Ghosh, Somsubhra Talapatra, Navonil Chatterjee, Santi P Maity and Hafizur Rahaman, “FPGA based Implementation of Embedding and Decoding Architecture for Binary Watermark by Spread Spectrum Scheme in Spatial Domain” in Bonfring International Journal of Advances in Image Processing, Vol. 2, No. 4, December 2012. pp. 01-08. ISSN (Online):2277-503X | ISSN (Print):2250-1053 DOI:10.9756/BIJAIP.3096

url: http://www.journal.bonfring.org/abstract.php?id=1&archiveid=309

URL: http://www.journal.bonfring.org/papers/aip/volume2/BIJ-002-3096.pdf

2015

[2] Sudip Ghosh,Arijit Biswas, Santi Prasad Maity and Hafizur Rahaman "Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture For Real-Time Applications" in special issue of "Journal of Low Power Electronics (JOLPE)" published by American Scientific Publishers in Vol. 11, No. 3, pp. 375-386, September 2015. DOI= http://dx.doi.org/10.1166/jolpe.2015.1388

URL: https://www.ingentaconnect.com/content/asp/jolpe/2015/00000011/00000003/art00014;jsessionid=m8mluvpu670h.x-ic-live-01

2017

[3] Sambaran Hazra, Sudip Ghosh, Sayandip De and Hafizur Rahaman "FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time"in special issue Springer journal of Real-Time Image Processing (RTIP), pp 1-29, online from 22nd February 2017. DOI= https://doi.org/10.1007/s11554-017-0672-9

URL: https://link.springer.com/article/10.1007%2Fs11554-017-0672-9

2018

[4] Subhajit Das , Sudip Ghosh, Nachiketa Das , Santi P. Maity , Hafizur Rahaman, Reshmi Maity and Niladri Maity, "Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach" Springer Circuits Systems and Signal Processing (CSSP) (2018). Volume 37, Issue 4, pp 1575–1593. First Online: 12 November 2018. DOI= https://doi.org/10.1007/s00034-018-0979-1

URL: https://link.springer.com/article/10.1007%2Fs00034-018-0979-1

2021

[5] Sudip Ghosh, Yuvam Bhateja, Joshua Roy Palathinkal, Hafizur Rahaman,"Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR" Springer Circuits Systems and Signal Processing (Springer CSSP)(2021). [2022 Armen H Zemanian Best Paper Awarded]

DOI= https://doi.org/10.1007/s00034-021-01807-5

URL: https://link.springer.com/article/10.1007/s00034-021-01807-5

2024

[6] Rupam Sardar, Sudip Ghosh, Bimal Datta "Designing Half-Adder with CMOS Technology using Artificial Neural Network with Verilog Implementation" International Journal of Scientific Research in Engineering and Management (IJSREM), Volume: 08 Issue: 03 | March - 2024. ISSN: 2582-3930 , DOI: 10.55041/IJSREM29025

[7]