Current Students
  1. Benjamin Gaudette
  2. Jinghua Yang
  3. Elham Azari
  4. Mehmet Ince
  5. Yufei Ma
  6. Paulina Davison
Former Students

 Niranjan KulkarniEnergy Efficient Digital Circuit Design using Threshold Logic Gates, Ph.D. CS 2015.
 Mahdi Hamzeh  Compiler and Architecture Design for Coarse-Grained Programmable Accelerators, Ph.D Computer Science, 2015. 
 Digant Desai Towards Energy Efficient Computing with Linux : Enabling Task Level Power Awareness and Support for Energy Efficient Accelerator, MSCS, 2013.
 Vinay Hanumaiah  Unified Framework for Energy-Proportional Computing in Multicore Processors: Novel Algorithms and Practical Implementation, Ph.D, EE 2013
 Yang Hu Testing of threshold logic latch based hybrid  circuits, MSEE 2013
 Benjamin Gaudette Energy Management in Solar Powered  Wireless Sensor Networks, MSCS, 2012
 Tejaswi Lingegowda Threshold Logic Properties and Methods: Applications to post-CMOS Design Automation and Gene Regulation Modeling, Ph.D. CS 2011.
Energy Optimal Speed Control for Components of Portable Systems, MSEE  2004
 Samuel Leshner Modeling and implementation of threshold logic circuits and architectures, Ph.D CS 2010
 Gayathri Chalivendra A new RNS 4-moduli set for implementation of FIR filters, MSEE 2011 
 Saurabh Patel Improving resilience against differential  power analysis with low area and power overhead using threshold logic, MSEE 2010
 Amit Goel Characterization of nanoscale digital circuits for statisical timing and signal integrity analysis, MSEE 2008
 Ravishankar Rao Fast and accurate techniques for early  design space exploration and dynamic thermal management of multi-core processors, Ph.D. EE, 2008
 Sudheendra Kadri Performance driven design space exploration in portable devices powered by fuel cell battery hybrid system, MSEE  2007
 Praveen Ghanta Stochastic performance modeling and analysis of VLSI circuits in the presence of process variations, Ph.D. EE 2007
 Sarvesh Bhardwaj Novel techniques for analysis and optimization of nano-scale digital circuits in the presence of process variations, Ph.D. EE 2006
 Sreeja Raj Statistical Timing Analysis, MSEE  2004
 Sridhar Dasika Energy Management of Sensor Networks, MSEE   2004
 Kaviraj Chopra Symbolic Algorithms for Identifying Minimum and Bounded Leakage States, MSEE  2004.
 Raghukiran Sreeramaneni Object Oriented Simulation of a GPS Receiver
 Bryce A. RasmussenA Design of a Counterflow Pipeline Processor, MSEE  1997.
 Daler RakhmatovEnergy Optimization for Portable, Battery Powered Systems, Ph.D. 2002.
Dynamic Scheduling in Runtime Reconfigurable Systems, MSEE  1998.
 Thomas J. Brown Algorithms for Clustering of Dataflow Graphs for Implementation on Dynamically Configurable FPGAs, MSEE  1998.
 Haibo Wang Field Programmable Analog Array Synthesis, Ph.D. 2002.
 Qi Wang Logic Synthesis for Low Power, Ph.D. 1999.
 Yukti Bareja RTL Level Power Estimation, MSEE  1998.
 David RutishauserObject Oriented Simulation of a GPS Receiver, MSEE  1998.
 Kendel McCarley Design of an High Performance Asynchronous Floating Point Unit, MSEE  1996.
 Edwin Tsun
 Design of an High Performance Asynchronous Floating Point Unit, MSEE  1996.
 Tzyh-Yung Wuu
Automatic Synthesis of Asynchronous Systems from Data-Flow Specifications, Ph.D. 1995.
 Hong-Yu Xie Gate Level Power Estimation, MSEE  1995.
 King C. Ho A Graph Theoretic Approach for Two Dimensional Topological Compaction of Regular VLSI Structures, Ph.D. 1994.
 Oliver Harquin Asynchronous Discrete Cosine Transform Processor, MSEE  1995
 Ang Li Partitioning for Pseudo Exhaustive Built-In Self-Test, MSEE  1991.
 Yung-Te Lai Logic Verification and Synthesis using Function Graphs, Ph.D. 1993.
 Amitava Majumdar Stochastic Models for Testing of Digital Circuits, Ph.D. 1992.
 Ravikumar Chennagiri Parallel Algorithms and Architectures or Physical Design of VLSI Circuits, Ph.D. 1991