Publications

 

Journal papers

  1. J. Rosenfeld and E. G. Friedman, “Linear and Switch-Mode Conversion in 3-D Circuits,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 11, pp. 2095-2108, November 2011.
  2. J. Rosenfeld and E. G. Friedman,"A Distributed Filter Within a Switching Converter for Application to 3-D Integrated Circuits," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 6, pp. 1075-1085, June 2011.
  3. J. Rosenfeld and E. G. Friedman, "Quasi-Resonant Interconnects: A Low Power, Low Latency Design Methodology," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 17, No. 2, pp. 181-193, January 2009.
  4. J. Rosenfeld and E. G. Friedman, "Design Methodology for Global Resonant H-Tree Clock Distribution Networks," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 15, No. 2, pp. 135-148, February 2007.

Conference papers

  1. K. Srinivasan and J. Rosenfeld, "Design of a 6 Gbps Continuous-Time Adaptive Equalizer Using a Voltage Rectifier Instead of a Power Detector,Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED), March 2013
  2. J. Rosenfeld, R. Muthukaruppan, N. V. Sharma, and J. F. Rohlman, "High Speed and High PSR LDO with Actively Controlled Output Resistance," Intel Design and Test Technology Conference (DTTC), August 2012.
  3. J. Rosenfeld and E. G. Friedman, "On-Chip Converters for Three-Dimensional ICs," Proceedings of the IEEE International Symposium on Quality Electronic Design, pp. 759 - 764, March 2009.
  4. J. Rosenfeld and E. G. Friedman, "Quasi-Resonant Interconnects: A Low Power Design Methodology," Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 641 - 644, May 2007.
  5. J. Rosenfeld and E. G. Friedman, "Design Methodology for Global Resonant H-Tree Clock Distribution Networks," Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 2073-2076, May 2006.
  6. J. Rosenfeld and E. G. Friedman, "Sensitivity Evaluation of Global Resonant H-Tree Clock Distribution Networks," Proceedings of the ACM/IEEE Great Lakes Symposium on VLSI, pp. 192-197, April/May 2006.
  7. J. Rosenfeld, M. Kozak, and E. G. Friedman, "A Bulk-Driven CMOS OTA with 68 dB DC Gain," Proceedings of the IEEE International Conference on Electronics, Circuits and Systems, pp. 5-8, December 2004.
  8. J. Rosenfeld, M. Kozak, and E. G. Friedman, "A 0.8 Volt High Performance OTA Using Bulk-Driven MOSFETs for Low Power Mixed-Signal SOCs," Proceedings of the IEEE International SOC Conference, pp. 245-246, September 2003.