JTAG Access


 Pin Std 14-pin JTAG DF3120
 1 Vdd Vdd
 2 Vss Vss
 4 Vss Vss
 6 Vss NC
 8 Vss NC
 10 Vss NC
 12 nRESET 
 13 Vdd NC
 14 Vss 

I managed to talk to the CPU using the Amontec JtagKey:
[michel@yap ~/sources/openocd]% ./src/openocd -f df3210.cfg
Open On-Chip Debugger 0.4.0-dev-00915-g134df4b (2009-12-10-21:58)
For bug reports, read
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
fast memory access is enabled
dcc downloads are enabled
Info : clock speed 6000 kHz
Info : JTAG tap: s3c2412.cpu tap/device found: 0x0792609d (mfg: 0x04e,
part: 0x7926, ver: 0x0)
Info : Embedded ICE version 6
Info : s3c2412.cpu: hardware has 2 breakpoints or watchpoints

[michel@yap /opt/minifs-mini2440]% telnet localhost 4444
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
target state: halted
target halted in ARM state due to debug-request, current mode:
Undefined instruction
cpsr: 0x2000009b pc: 0x0000cc24
MMU: disabled, D-Cache: enabled, I-Cache: disabled

Here is a "Load u-boot" script to plonk a uboot in memory and run it. Note it uses the "low_level" init code first to initialize the ram. You will need to adapt it with your pathnames

reset_config srst_pulls_trst
#reset halt
arm9tdmi vector_catch undef reset fiq
echo "DF3120: halted. Gonna upload image."
arm7_9 dcc_downloads disable
load_image u-boot/board/df3120/lowlevel_foo.bin 0
arm7_9 dcc_downloads enable
bp 0x30780000 4 hw
echo "DF3120: Waiting till first memsetup is done...."
rbp 0x30780000
echo "DF3120: Done. Loading main uboot image..."
mww 0x30700000 0xdeadbeef
mdw 0x30700000
load_image u-boot/u-boot.bin 0x30780000
load_image u-boot/u-boot.bin 0x30400000
echo "DF3120: Done. Verifying image..."
verify_image u-boot/u-boot.bin 0x30780000
echo "DF3120: Ok, booting it."
#p 0xc000890c 4 hw
resume 0x30780000
#rbp 0xc000890c

Michel Pollet,
Jan 28, 2012, 10:12 AM