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Dr. Ravi Saini (Phd, M.Tech)

Principal Scientist, Iintegrated Systems Group (CPS Area) 
CSIR - Central Electronics Engineering Research Institute (CSIR-CEERI)
(Council of Scientific and Industrial Research) 

Pilani - 333031, Rajasthan, India. 
Phone No.: +91-1596-252214(O); +91-1596-242294(F) 
Email: ravi.csirceeri@gmail.com; ravi@ceeri.ernet.in


Areas of Research Interest 

  • Resorource Constraint AI
  • ASIC & ASIP Design
  • VLSI Architectures for Image & Video Processing Algorithms
  • FPGA Based Embedded System Design
  • Digital VLSI Design 
  • HDLs  Based FPGA Design


Research Experience      

      • Principal Scientist (Feb, 2018 – Present) and Associate Professor (Feb, 2018 - Present)
        • Integrated Systems Group (CPS Area), CSIR-CEERI, Pilani, Academy of Scientific & Innovative Research (AcSIR), India 
      • Senior Scientist (Feb, 2013 – Feb, 2018) and Assistant Professor (August, 2010 - Present  
        • IC Design Group, CSIR-CEERI, Pilani, Academy of Scientific & Innovative Research (AcSIR), India 
      • Scientist (Feb, 2005 – Feb, 2013) 
        • IC Design Group, CSIR-CEERI, Pilani, India 
      • Senior Research Fellow (April 2003 - Feb, 2005)
        • IC Design Group, CSIR-CEERI, Pilani, India 

     


    Academic Details 

    • Ph. D. (2013)
              Thesis Title: "Application Specific VLSI Processor Design for Parametric Speech  
                                       Synthesis"

              Supervisors: Dr. Chandra Shekhar, Director, CSIR-CEERI, Pilani, India. 
                                     Prof. B. Prasad, Elect. Sc. Dept., KUK, India. 
              Research Lab: IC Design Group, CSIR-CEERI, Pilani. 
              University: Kurukshetra University, Kurukshetra (KUK), H
    aryana, India 

    • M. Tech. (2002) in Instrumentation Engineering 
              Punjab University, Chandigarh, India 
    • M. Sc. (2000) in Electronics 
              DAVV, Indore, MP, India 
    • B. Sc. (1998) in Electronics
              Kurukshetra University, Kurukshetra, Haryana, India.



    Professional Associations

    • Member, IEEE (Institute of Electrical and Electronics Engineers), USA (January 2011 - Present)
    • Member, SSI (Semiconductor Society of India) (August 2013 - Present)


    Reviewer 

    • Reviewer, Journal of The Institution of Engineers (India): Series B, Springer
    • Reviewer, IEEE Sponsored International Conference on Advances in Computing, Communications and Informatics (ICACCI-2015), India
    • Reviewer, IEEE Sponsored International Conference on Advanced Electronic Systems (ICAES), CSIR-CEERI, Pilani, India. September 21-23, 2013


    Honors

    • Special Guest and Project Elevator, Science Exhibition (60 Projects), JJT University, Jhunjhunu, Rajasthan, India, January 09, 2015
    • Chief Guest, Engineer's Day, Yaduvanshi College of Engineering and Technology, Narnaul, Haryana, India, September 14, 2014
     


    CSIR Associations

    • Member of Sports Promotion Board (SPB), CSIR from 2009 to 2012
    • Captain of All India CSIR Cricket Team since 2011
    • CSIR won prestigious Nayudamma Memorial Cricket Tournament 2 times under my captainship and awarded  best batsman 2 times
     


    Personal Details 

    • Date of Birth: December 12, 1976 
    • Sex: Male 
    • Present Address:
                House No. D-18, CEERI Colony
                CEERI, Pilani,
                District – Jhunjhunu
                State – Rajasthan, India. 
                Pin Code – 333031.