RAMP Gold is an economical FPGA-based architecture simulator developed at the UC Berkeley Parallel Computing Lab. It allows rapid early design-space exploration of manycore systems. RAMP Gold models target-system timing and functionality separately, and it employs hostmultithreading for an efficient FPGA implementation. It is a high-throughput, cycle-accurate full-system simulator, capable of booting real operating systems. The RAMP Gold prototype runs on a single Xilinx Virtex-5 FPGA board and simulates a 64-core shared-memory target machine. We evaluate its performance using a modern parallel benchmark suite running on our manycore research operating system, achieving two orders of magnitude speedup compared to a widely-used software-based architecture simulator. RAMP Gold source code is under the BSD/GNU license. |
Recent News
-
Major update in Fall
We will push a major update of RAMP Gold in Q4 this year, which will include some significant improvements. Here are some highlights of this upcoming update:
Hardware
+ Better flush ...
Posted Jul 27, 2011, 9:27 PM by xtan
-
Our Manycore OS is live
Our sister Manycore research OS (Akaros) is live. It runs on both x86 and RAMP Gold. Download and support is provided at:
http://akaros.cs.berkeley.edu/
Posted May 18, 2011, 9:17 PM by xtan
-
Recruiting Undergrad/Graduate Researchers
We are looking for paid undergrad/graduate researchers or 5-year master students this summer/fall to help brining up the software infrastructure on our large-scale datacenter simulator (built ...
Posted Mar 25, 2011, 8:00 PM by xtan
-
A minor fix in the functional simulator
-Addressed a performance counter issue
Posted Mar 24, 2011, 6:01 PM by xtan
-
HW source code update
- Fix a frontend link bug (babbling nic under heavy load).- Improve the integer multiplier mapping. More DSPs are used now.- Improve the Ethernet power-on reset logic. Manually hitting reset ...
Posted Jan 25, 2011, 4:13 AM by xtan
|
|
