Pierre-Emmanuel Gaillardon is assistant professor in the Electrical and Computer Engineering (ECE) department at The University of Utah, Salt Lake City, UT and he leads the Laboratory for NanoIntegrated Systems (LNIS). He holds an Electrical Engineer degree from CPE-Lyon, France (2008), a M.Sc. degree in Electrical Engineering from INSA Lyon, France (2008) and a Ph.D. degree in Electrical Engineering from CEA-LETI, Grenoble, France and the University of Lyon, France (2011).
Prior to joining the University of Utah, he was a research associate at the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland within the Laboratory of Integrated Systems (Prof. De Micheli). and a visiting research associate at Stanford University, Palo Alto, CA, USA. Previously, he was research assistant at CEA-LETI, Grenoble, France. Prof. Gaillardon is recipient of the C-Innov 2011 best thesis award and the Nanoarch 2012 best paper award.
He is an Associate Editor of the IEEE Transactions on Nanotechnology. He has been serving as TPC member for many conferences, including DATE'15-16, DAC'16, Nanoarch'12-16, and is reviewer for several journals and funding agencies. He will serve as Topic co-chair "Emerging Technologies for Future Memories" for DATE'17. He is a senior member of the IEEE.
The research activities and interests of Prof. Gaillardon are currently focused on the development of reconfigurable logic architectures and digital circuits exploiting emerging device technologies and novel EDA techniques.
Dr. Gaillardon constantly encourages prospective PhD and MSc students to apply to his research group at the University of Utah.
His research is located on the boundary between emerging device technologies, digital design and design automation. Projects are carried out in an interdisciplinary team with a wide range of competences and in close collaboration with other labs and partners.
Interested applicants shoud send CV and research statement by e-mail to Dr. Gaillardon at the following address:
NEWS 03/07/2017: Paper "A Compiler for Parallel and Resource-Constrained Programmable in-Memory Computing" has been accepted by IWLS'17 conference! Congratulations to Giulia!
NEWS 03/07/2017: Paper "A PLiM Computer for the IoT" has been accepted for publication by Computer magazine! Congratulations to Mathias!
NEWS 03/01/2017: Paper "Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs" has been accepted for publication by Nature's Scientific Reports! Congratulations to Giovanni!
NEWS 02/20/2017: Five papers accepted at the IEEE ISCAS conference! Congratulations to Edouard, Xifan, Alexandre, Ioulia, Mahesh and Mathias!
NEWS 02/14/2017: Paper "Effect of O2- migration in Pt/HfO2/Ti/Pt structure" has accepted for publication by the Journal of Electroceramics. Congratulations to Maxime!
NEWS 02/14/2017: Paper "Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains" has been accepted by GLSVLSI'17. Congratulations to Zhufei!
NEWS 02/01/2017: Congratulations to Jorge who won the spring semester IMFlash TechTalks! Way to go! Picture HERE
NEWS 01/12/2017: Paper "Operation regimes and electrical transport of steep slope Schottky Si-FinFETs" has been accepted for publication by AIP JAP. Congratulation team!
NEWS 01/12/2017: Paper "Low Temperature Wet Conformal Nickel Silicide Deposition for Transistor Technology through an Organometallic Approach" has been accepted by publication by ACS AMI. Congratulation team!
NEWS 01/09/2017: The Laboratory for NanoIntegrated Systems (LNIS) welcomes three new doctoral students: Tom Becnel, Edouard Giacomin and Jorge Romero Gonzalez. Welcome aboard!
NEWS 01/03/2017: Paper "Exact Synthesis of Majority-Inverter Graphs and Its Applications" has been accepted for publication by IEEE TCAD. Congratulations to Mathias!
NEWS 12/14/2016: Paper "Optimization Opportunities in RRAM-based FPGA Architectures" has been accepted by LASCAS'17 conference. Congratulations to Xifan!
NEWS 12/08/2016: Prof. Gaillardon was elevated to the grade of IEEE senior member!
NEWS 12/07/2016: Paper "Circuit Designs of High-performance and Low-power RRAM-based Multiplexers based on 4T(ransistor)1R(RAM) Programming Structure" has been accepted for publication by IEEE TCAS-I. Congratulations to Xifan and Edouard!
NEWS 11/17/2016: The Special Session entitled "Computing with memory devices" organized by Prof. Gaillardon and Prof. Ielmini has been accepted by the ISCAS'17 commitee!
NEWS 11/13/2016: Paper "A Continuous Compact DC Model for Dual-Independent-Gate FinFETs" has been accepted for publication by IEEE JEDS. Congratulations to Mehdi!
NEWS 11/12/2016: Paper "Physical Design Considerations of One-level RRAM-based Routing Multiplexers" has been accepted by ISPD'17 conference. Congratulations to Xifan and Edouard!
NEWS 11/10/2016: The Special Session entitled "EDA as an Emerging Technology Enabler" organized by Prof. Gaillardon and Dr. Soeken has been accepted by the DATE'17 commitee!
NEWS 11/07/2016: Paper "A High-performance FPGA Architecture Using One-Level RRAM-based Multiplexers" has been accepted for publication by IEEE TETC. Congratulations to Xifan!
NEWS 11/05/2016: Prof. Gaillardon will deliver the Keynote speech at ISVLSI 2017 in Bochum!
NEWS 11/04/2016: Paper "Endurance Management for Resistive Logic-In-Memory Computing Architectures" has been accepted by DATE'16 conference. Congratulations to Saeideh!
NEWS 11/02/2016: Paper "Majority-Inverter Graph: A New Paradigm for Logic Optimization" has been ranked in the top-10 popular TCAD articles for the last 5th months!
NEWS 10/27/2016: Prof. Gaillardon has been invited as Visiting Assistant Professor by EPFL for summer 2017..
NEWS 10/24/2016: Prof. Gaillardon has been invited to serve as reviewer the TPC of DAC'17 in the track EDA9.
NEWS 10/24/2016: Paper "Control of Resistive Switching in Mott Memories Based on TiN/AM4Q8/TiN MIM Devices" has been accepted by ECST.
NEWS 10/20/2016: Pr. Gaillardon co-authored a book chapter "Logic Synthesis for Majority based In-Memory Computing" to appear in the Springer book "Memristors, Memristive Devices and Systems".
NEWS 09/11/2016: Prof. Gaillardon has been invited to give a talk at the IEEE CEDA Design Automation Futures workshop to be held in Freemont (CA, USA) on October 21-22 2016.
NEWS 09/02/2016: Papers "Multi-level Logic Benchmarks: An Exactness Study" and "A Novel Basis for Logic Rewriting" have been accepted by ASP-DAC'17 conference. Congratualtions to Luca and Winston!
NEWS 08/29/2016: Paper "Majority-Inverter Graph: A New Paradigm for Logic Optimization" is ranked 5th in the top-10 popular TCAD articles of July 2016!
NEWS 08/15/2016: Paper "A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors" has been accepted by JETC. Congratulations to Hassan!
NEWS 08/03/2016: The LNIS lab is proud to make available the first open-source CMOS-RRAM Design Kit (DK) add-on - Visit the download page!
NEWS 07/27/2016: Paper "Majority-Inverter Graph: A New Paradigm for Logic Optimization" is ranked 3rd in the top-10 popular TCAD articles of June 2016!
NEWS 07/12/2016: Papers "A Study on the Programming Structures for RRAM-based FPGA Architectures" and "Majority-Inverter Graph: A New Paradigm for Logic Optimization" are in the top-10 popular (May. 2016) IEEE TCAS-I and TCAD articles!
NEWS 06/17/2016: Paper "Polarity control in WSe2" has been accepted for publication by Scientific Reports. Congratulations to Giovanni!
NEWS 06/02/2016: Paper "A Study on the Programming Structures for RRAM-based FPGA Architectures" is in the top 50 popular (Apr. 2016) IEEE TCAS-I articles!
NEWS 06/01/2016: Paper "Inversion Optimization in Majority-Inverter Graphs" has been accepted by NANOARCH'16 conference. Congratulations to Eleonora!
NEWS 04/26/2016: Paper "Perspectives of Multiple-Independent-Gate Field Effect Transistors for Efficient Terahertz Detection Applications" has been accepted by SPIE Terahertz Emitters, Receivers, and Applications VII Conference. Congratulations to Mehdi!
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