• VLSID'17Compact Implementations of FPGA-Based PUFs with Enhanced Performance
  • SECITC'15SCA Resistance Analysis on FPGA Implementations of Sponge based MAC-PHOTON


  I am a Scientist in the Hardware Security research group at Society for Electronic Transactions and Security (SETS), Chennai, India. I also worked an Research Associate at SPMS, Nanyang Technological University (NTU), Singapore. 

   In Jan 2016, I started my PhD program in Computer Science Engineering at Indraprastha Institute of Information Technology (IIIT-Delhi) under the supervision of Dr. Somitra Kumar Sanadhya and Dr. Mohammad Hasmi

Research Interests: 

    Hardware Security and Trust, with emphasis on: 

        1. Efficient and secure hardware implementations of symmetric/lightweight cryptographic primitives. 

        2. Side-channel and fault attacks.

        3. Hardware Trojan Detection and Physically Unclonable Functions (PUFs).

Contact Me

Address: Society for Electronic Transactions and Security [SETS]

M.G.R Knowledge City, CIT Campus,

Taramani, Chennai, India - 600113

Phone:+91 9003019193

E-mail:nakumar[at]setsindia.net; nallananth[at]gmail.com