Dr. Nalla Anandakumar, PhD

N. Nalla Anandakumar is currently a Senior Specialist Security Architect at Continental Automotive, Singapore. Before this, he was a postdoctoral fellow at the Florida Institute of Cyber ​​Security Research (FICS), University of Florida, USA from 2020 to 2023. Prior to this, he was a Scientist at the Society for Electronic Transactions and Security (SETS) (Under O/o Principal Scientific Adviser to the Government of India) from 2008 to 2020 (12 years). He was also a visiting researcher at the Nanyang Technological University (NTU), Singapore in 2013. He received a Ph.D. degree from IIIT-Delhi, India in 2020, a M.E degree from Anna University, Chennai, India in 2006 and a B.E degree from GCE, Salem, India in 2003. His current research interests include hardware security with a specific focus on Secure hardware/software architecture design, physically unclonable functions (PUFs), implementations of classical and post quantum cryptographic (PQC) algorithms, automotive and embedded security, side-channel and fault injection attacks, and hardware IP protection. During his 15 years of service, he led several scientific and development projects sponsored by the government, industry, and public sectors in the field of hardware security. His research has resulted in one book (Hardware Security Training, Hands-on!), 16 book chapters, and more than 25 internationally peer-reviewed publications in premier journals and conferences including the IEEE TCAS, ACM TRETS, IEEE Access, IET Circuits Devices & Systems, DATE, VLSID, Elsevier Integration, MICPRO, INDOCRYPT, VLSI-SOC, etc. He also has served on many technical program committees as well as organizing committees of premier conferences and workshops. He also served as a peer reviewer for more than 100 technical journal and conference papers. Currently, he serves as a Secretary of Hardware Security Standards Committee (HSSC) with CAS Chapter for IEEE SASD. He is a senior member of IEEE.