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I currently work as a Senior Hardware Engineer at Nvidia Corporation. My current work involves designing HDR Pipeline for Nvidia's GSYNC module. On a typical day, you can spot me looking at waveforms, debugging failures of  System level Hardware/software tests.

 I graduated from the Electrical Engineering Dept. at University of California, Los Angeles.  

At UCLA, I worked as a Junior Development Engineer at the Photonics Lab, headed by Prof. Bahram Jalali.
My research at UCLA involved processing of data from STEAM (the world's fastest imaging system) using FPGAs.

Publications : http://www.pnas.org/content/early/2012/06/25/1204718109

                   

                      

Areas of work :  RTL Design, scripting using PERL, Debug using Emulation Platform.

                            RTL/ASIC system level design and implementation of High Profile MPEG -2/4 decoders on FPGAs; Architectural Design of System on Chip.
                            Links :
                                 1. Article about my group's work in design-reuse
                                 2. Article about my group's work in siliconindia
                                 3. Article about my group's work in thesmarttechie
                                                                

                                 email : jagannath.s3@gmail.com
                                            jsadasivam@nvidia.com
         
                                 phone : 001 408-386-8039  
               
                                   Education : Master of Science in Electrical Engineering, UCLA ( www.ucla.edu )
                                                     Bachelor of Engineering, electronics and communication, NITK ( http://www.nitk.ac.in/ )
                   
  

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