Abstract

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Understanding Program Behavior with Intel® Processor Trace

This tutorial will present a new hardware feature on recent Intel Architectures called Intel Processor Trace (PT). PT allows capturing branch outcomes and timing information on code executing on the processor with minimal perturbation (less than 5% runtime overhead). With outcomes of every branch executed, a developer can reconstruct the control-flow of a program execution offline and use that information to aid diagnosis. PT also produces periodic timestamps, which can be used to coarsely correlate execution traces across multiple threads and cores, and also to align the hardware traces with software traces, thus allowing a richer execution profile to be built. This enables developers to understand very detailed timing and functional behavior of their programs at a level accuracy and low-runtime overhead not available before on Intel CPUs.

Intel Processor Trace can monitor the execution of user-level and kernel code, and can collect cycle information at a granularity as fine as a handful of branches. This allows the construction of very detailed execution profiles, and facilitates performance and correctness debugging at level of precision that sampling techniques, using performance counters, cannot offer. This level of visibility enables research ideas in various areas of program behavior analysis, including but not limited to, the following: 1) static and dynamic analysis; 2) detailed performance understanding and diagnosis; 3) security analysis and validation; 4) program behavior visualization; 5) program code coverage; 6) software failure understanding; 7) post-mortem crash dump analysis.

This tutorial will explain what Intel Processor Trace is, how it works and how can a developer can use it, including demonstrations of how to use open source tools to both collect and analyze the information produced by the hardware as well as how to build your own collectors and tools. We will demonstrate how to write your own driver to collect traces, in addition to providing a pointer to a simple driver that anyone can download.  We will explain how to use freely distributed software to decode collected packets (via the Intel® Processor Analysis Library) and visualize them. Furthermore, Intel Processor Trace has been integrated with open-source tools like Gnu Debugger (gdb) and Linux ‘perf’, as well as Intel® VTune, the Intel JTAG Debugger and the Windows Debugger (WinDBG). New capabilities enabled in these tools by Intel PT will be discussed and demonstrated. 

At the end of this tutorial, the attendee will be able to use an Intel Processor Trace enabled machine to collect the aforementioned information and therefore enrich his/her own future research work.

Tentative Program

  1. Intel PT Overview (1 hour)
  2. break (5 minutes)
  3. Debug using PT with GDB (30 mins)
  4. Scripting analysis using PT with Linux perf (40 mins)
  5. break (10 minutes)
  6. GUI-based Profiling using PT with Vtune (40 mins)
  7. Time permitting: Review tool building-blocks such as simple-pt and libipt
  8. Wrap-up, Discussion (20 mins)

Organizers

Cristiano Pereira holds an MS degree in Computer Science from the Federal University of Minas Gerais, Brazil, and a PhD degree in Computer Science and Engineering from the University of California, San Diego, USA. Currently Cristiano works for the Software and Services Group at Intel Corporation. His research focuses on hardware and software co-design for software programmability tools such as performance analysis, debugging and monitoring for correctness and performance. Cristiano also manages the SSG research program, which funds research projects between academia and Intel Software. In the past he has worked in various corporations in Brazil, in the areas of SCADA systems and telecommunications. 

Beeman Strong is a CPU architect in the Platform Engineering Group.  He has been at Intel for 19 years, starting out in CPU validation on the Pentium 4.  More recently he took over as lead architect for Intel® Processor Trace, and holds several patents in the area of trace and debug.  He earned his BSEE from the University of Texas at Austin.

Gilles Pokam is a researcher at Intel Labs (IL). His interests are in multicore architecture and Software, with a current emphasis on improving programmer productivity. Before joining IL, Gilles was a researcher at IBM T.J. Watson Research Center in NY and a Post-doctoral researcher at the University of California, San Diego. He received a PhD from INRIA Lab and the University of Rennes I, in France. Gilles is the recipient of the IEEE MICRO Top Picks Award 2006 that recognizes the most significant papers in computer architecture. He has authored 30+ papers and holds a dozen of patents in the area of architecture support and tools for programmer productivity. Gilles is member off IEEE and ACM.