After finishing my Masters degree in Computer Science at OGI in the spring of 2004 I returned in the fall of 2004 to start my second Masters degree in Electrical Engineering. I had decided to return for the Electrical Engineering degree as I was working for the processor design group and even if I did not finish I knew that a solid EE background would be helpful. Also, Intel agreed to pay for the degree and at $2500 a class it seemed like an offer I could not refuse.
What follows is a small description of the three classes I took in the EE program at OGI. After the first year I decided to stop taking classes as my wife was also returning to school to start her advanced degree. Once she finishes her degree I may return to finish up my EE degree but at this point in time it is so far away I can't say for sure one way or the other.
EE570 - Advanced Logic Design
Despite what the title says, this is really an introductory class to logic design. This class was my first introduction to both structural and behavioral verilog. Most of the Karnaugh maps and circuit designs we learned in this class are rarely used anymore as computers synthesizes most of this for you now. We spent a lot of time with the simulator and the final project we worked on was carried over into the next class.
EE571 - System on Chip
This class was a lot of fun. For this class we got to program a real FPGA. The lab boards we used had about 4 LEDs, 4 input buttons, and 4 8 segment displays for showing numbers and letters. It also had a serial input (which we did not use) and a vga output (which we did use). The first lab we did was to create a basic stop watch on the 8 segment displays, using the buttons for controls. In order to program the board we would write behavioral verilog on the computer, simulate it, check for bugs, then synthesize it on the computer and download it into the board. Once download the board could be unplugged from the computer and used stand alone.
For the final project my group (two people) decided to do a breakout style game using the vga output. The vga output had to be programmed with the write horizonal and vertical sync rates. The instructor had given us a very small 9 bit cpu which we were also able to use in our project. Since a 9 bit computer can only take 2^9 instructions I had to create several off cpu processors to handle compute intensive tasks, like collision detection. We were able to complete the project on-time and both instructors were able to play the game ... although neither was able to complete the board. (Which is a good thing, as we only had the one board programmed.)
EE572 - Advanced Digital Design Timing Analysis
This class was probably the most difficult class of the three. The first class was an introduction, and the second was a time intensive lab class, but this class required the most analytical thinking. We learned how to deal with metastability and how to design with timing constraints. The most interesting subject in this class was designing for micro-pipelines, which is also called self timed logic. After going through all the pain of clock timed logic, self timed logic seems like a breath of fresh air. If given enough time I would love to explore this topic further.