I am a Ph.D. Candidate in the Electrical and Computer Engineering at Virginia Tech. I received the FMCAD best paper award in 2013. Completed both my B.Sc. and M.Sc. with GPA 4.0/4.0 from AAST, Egypt. My main research interests are hardware/software program synthesis and verification using formal methods. I have developed several security tools for verification and synthesis of cryptography side-channel attack countermeasures and embedded control software.
Some Research Interests