The SMPS for my stereo UcD amplifier has to meet a wide range of demands.

  • 10-16V input voltage range
  • +-45V@6.6A regulated output (600W)
  • +-12V@200mA regulated (for pre-amp)
  • Output voltage balancing to negate the effects of reverse energy flow from the amplifier modules
  •  No minimum load requirement
  •  Primary side overcurrent protection and soft-start

The input voltage range together with the currents involved has lead to the selection of the push-pull topology. The requirement for no minimum load makes the Average Current Mode Control (A-CMC) suitable for this design. One problem with A-CMC together with push-pull is that the transformer/diode combination removes the output inductor downslopes from the current sensed through the primary side Current Transformer (CT). This problem is resolved by letting a current-source driven capacitor follow the CT output for the rising portion, and letting a current source of 10uA discharge the it at a constant rate to emulate worst case inductor current downslope.

The SMPS is required to provide 600W rms at low battery voltage before the overcurrent protection kicks in, it can do this for short periods of time before meltdown occurs (most likely failure of the magnetic components), the long term rms power capability has been designed to be around 200W rms. This is by far overkill as the crest factor of music puts peak-to-average somewhere around 15%. I have yet to decide whether to put temperature sensing in the transformer cores and heatsinks or not.

The UcD modules have been designed around exotic components, no throuble has been spared in their design. This SMPS on the other hand has the demand of using only off the shelf-components available from ELFA or the giant scrapheap on my floor. I have decided to use the classic UC2526 voltage mode controller in a modified way as an A-CMC controller. The inner current loop has been designed with high DC-gain, hogging 75% of the available bandwidth given from slope matching, the remaining 25% comes from the outer voltage control loop. The outer voltage loop has been chosen with only P-action to avoid over/under-shoot during load steps, simulations show very little deviation from programmed voltage even in the absence of low-frequency gain.

I have yet to design this SMPS, below is given a picture of the latest SPICE-simulation of my work. NOW UPDATED!

 NEW - KICAD schematic of the not yet built prototype

This far has only the basic mechanism for providing center-tapped 90V from 10-16V with overcurrent protection been designed. The input EMI-filter (C-L-C?), interface with the car-stereo (remote cable), and the voltage balancer which will be tapped with extra windings to provide +-12V for pre-amplifier stages still remain to be designed.