The 5th ACM SIGPLAN Workshop on
Functional High-Performance Computing
FHPC'16 will be held in Nara, Japan,
on Thursday, September 22, 2016.
Check the call for participation with tentative program.
List of accepted papers is available.
Please see the full call for papers for additional information.
The FHPC workshop aims at bringing together researchers exploring uses of functional (or more generally, declarative or high-level) programming technology in application domains where high performance is essential. The aim of the meeting is to enable sharing of results, experiences, and novel ideas about how high-level, declarative specifications of computationally challenging problems can serve as maintainable and portable code that approaches (or even exceeds) the performance of machine-oriented imperative implementations.
All aspects of performance critical programming and parallel programming are in-scope for the workshop, irrespective of hardware target. This includes both traditional large-scale scientific computing (HPC), as well as work targeting single node systems with SMPs, GPUs, FPGAs, or embedded processors. FHPC 2016 seeks to encourage a range of submissions, focussing on work in progress and facilitating early exchange of ideas and open discussion on innovative and/or emerging results. Experience reports are also welcome.
FHPC'16 will be held at at the at the Nara Kasugano International Forum in Nara, Japan. The workshop is co-located with the ICFP 2016 conference. Please see the ICFP local information pages for travel information and tips.