Zhenman Fang

   Will join Simon Fraser University as a
   Tenure-Track Assistant Professor in Spring 2019 

   Staff Software Engineer, Xilinx
   Before that: Postdoctoral Scholar,
   Department of Computer ScienceUCLA
   Email: zhenman underscore fang at sfu dot ca
   Address: 8888 University Dr, Burnaby, BC V5A 1S6, Canada

Recent News

PIEEE 2018 paper accepted, summary and highlights of CDSC's decade effort!
Co-organizing ASAP 2019, welcome to submit!
Invited to DATE 2019 TPC.
Organizing ReconfigAccel 2018 workshop, welcome to submit!
papers accepted by FCCM 2018!
ISPASS 2018 best paper nominee!
TCAD 2018 paper accepted!

Quick Links:  Student Recruiting CV Research Projects | Publications | Google Scholar 


Dr. Zhenman Fang will join School of Engineering Science (Computer Engineering Option), Simon Fraser University as a Tenure-Track Assistant Professor in Spring 2019. He is actively looking for PhD and Master students to join his group. Please find more details in the recruiting page.

Zhenman has worked in the Xilinx SDx group at San Jose as a Staff Software Engineer since Sept 2017, where he works on the topic of accelerator-rich architectures and systems, which is the major focus of his postdoc research at UCLAFrom July 2014 to Sept 2017, Zhenman was a postdoc in Department of Computer Science, UCLA, under the supervision of Prof. Jason Cong and Prof. Glenn Reinman. While at UCLA, he was also a member of the NSF/Intel funded multi-university Center for Domain-Specific Computing (CDSC) and SRC/DARPA funded multi-university Center for Future Architectures Research (C-FAR)Zhenman earned his Ph.D degree in July 2014 from School of Computer Science, Fudan University, China, under the supervision of Prof. Binyu Zang. He also spent the last 15 months of his PhD study visiting Department of Computer Science and Engineering, University of Minnesota at Twin Cities, under the supervision of Prof. Pen-Chung Yew

Zhenman's recent research focuses on customizable computing with specialized hardware acceleration, which aims to sustain the ever-increasing performance and energy-efficiency demand of important application domains in post-Moore’s law era. It spans the entire computing stack, including application drivers, novel computer architectures, and corresponding programming and runtime support.

Research Interests

  • Emerging workload characterization and optimization: especially for computational genomics, machine learning, and image processing
  • Computer architecture: especially for heterogeneous and energy-efficient accelerator-rich architectures (ARAs), multicore and many-core architectures, memory systems and near data computing
  • Compiler optimization: especially for improving memory system performance, and compiler support for the above architectures
  • Big data computing system: especially for enabling FPGA accelerators in datacenter
  • Performance evaluation and design automation: especially for architectural simulation, benchmarking, prototyping, and GPU-FPGA comparison

Education and Training

  • 2014.7 ~ 2017.9    Postdoc, Computer Science, UCLA
  • 2013.4 ~ 2014.7    Visiting Ph.D Student, Computer Science and Engineering, University of Minnesota at Twin Cities
  • 2009.9 ~ 2014.7    Ph.D Student, Computer Science, Fudan University, China
  • 2005.9 ~ 2009.7    B.Eng., Software Engineering, Fudan University, China
  • 2006.9 ~ 2009.7    B.Sci., Computer Science, University College Dublin, Ireland. (Joint-degree)

Professional Services

  • ASAP 2019 Publicity chair, The 30th IEEE International Conference on Application- specific Systems, Architectures and Processors (ASAP 2019)
  • DATE 2019 PC, 2019 Design Automation and Test in Europe (DATE 2019)
  • ReconfigAccel 2018 Organizing Co-Chair, International Workshop on Reconfigurable Acceleration in Datacenters (ReconfigAccel 2018), In conjunction with the 32nd ACM International Conference on Supercomputing (ICS 2018)
  • ICS 2018 Sponsor Co-Chair, The 32nd ACM International Conference on Supercomputing (ICS 2018)
  • DATE 2018 PC, 2018 Design Automation and Test in Europe (DATE 2018)
  • ICCD 2017 PC, The 35th IEEE International Conference on Computer Design (ICCD 2017)
  • IISWC 2017 PC, 2017 IEEE International Symposium on Workload Characterization (IISWC 2017)
  • HPCA 2017 Registration & Travel Awards Chair, The 23rd IEEE Symposium on High Performance Computer Architecture (HPCA 2017)
  • MICRO 2016 Tutorial Organizer, “Rapid Exploration of Accelerator-rich Architectures: Automation from Concept to Prototyping”, with David Brooks, Jason Cong, Yakun Sophia Shao, Sam Xi. The 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Taipei, Taiwan, Oct 2016.
  • ISCA 2015 Tutorial Organizer, “Rapid Exploration of Accelerator-rich Architectures: Automation from Concept to Prototyping”, with David Brooks, Yu-Ting Chen, Jason Cong, Brandon Reagen, Glenn Reinman, Yakun Sophia Shao, Gu-Yeon Wei and Sam Xi. International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015.
  • Poster Session Chair, Center for Domain-Specific Computing 2014 Annual Review, 2015 Semi-Annual Review, 2015 Annual Review, 2017 Semi-Annual Review 
  • Panelist, FPGAs vs GPUs Center for Domain-Specific Computing 2017 Semi-Annual Review 
  • Early Career Research Committee Member, UCLA Institute for Digital Research and Education (IDRE)
  • Reviewer, IEEE Transactions on Parallel and Distributed Systems (TPDS)
  • Reviewer, IEEE Access
  • Reviewer, IEEE Transactions on Biomedical Circuits and Systems (TBioCAS)
  • Reviewer, IEEE Transactions on Computers (TC)
  • Reviewer, IEEE Transactions on Circuits and Systems II (TCAS-II)
  • Reviewer, IEEE Micro
  • Reviewer, IEEE Transactions on Very Large Scale Integration Systems (VLSI)
  • Reviewer, IEEE Computer Architecture letters (CAL)
  • Reviewer, IEEE Transactions on Multi-Scale Computing Systems (TMSCS)
  • Reviewer, ACM Transactions on Programming Languages and Systems (TOPLAS)
  • Reviewer, ACM Transactions on Architecture and Code Optimization (TACO)
  • Reviewer, ACM Journal on Emerging Technologies in Computing Systems (JETC)
  • Reviewer, Elsevier Journal of Parallel and Distributed Computing (JPDC)
  • Reviewer, Elsevier Journal of Parallel Computing (ParCo)
  • Reviewer, Elsevier Microprocessors and Microsystems (MICPRO)
  • Reviewer, Integration, the Elsevier VLSI Journal (INTEGRATION)
  • Reviewer, Journal of Universal Computer Science (J.UCS)
  • Reviewer, Design Automation Conference 2018 (DAC 2018)
  • Reviewer, Design Automation Conference 2016 (DAC 2016)
  • Reviewer, ACM/SIGDA International Symposium on Field-Programmable Gate Arrays 2016 (FPGA 2016)

Teaching Assistant

  • Computer Architecture, Spring, 2009 ~ 2012
  • Compiler, Fall, 2009
  • Project Management, Fall, 2011


  • ISPASS 2018 Best Paper Nominee
  • MEMSYS 2017 Best Paper Award
  • HPCA 2017 Best Paper Nominee
  • Outstanding Reviewer, Elsevier Journal of Parallel and Distributed Computing (JPDC), 2016 & 2018
  • Outstanding Reviewer, Elsevier Microprocessors and Microsystems (MICPRO), 2017
  • Outstanding Reviewer, Integration, the Elsevier VLSI Journal, 2017
  • UCLA Institute for Digital Research and Education (IDRE) 2016-2017 Postdoc Fellowship
  • Best Demo Award (3rd Place out of 49 Demos) at C-FAR 2016 Annual Review
  • ACM SIGARCH ISCA 2015 Travel Grant
  • Tencent Innovative Special Award, 2012 (only 3 students in Fudan University)
  • National Ph.D Graduate Scholarship 2012 (highest student honor in China)
  • The ACM PAC awards support for LCTES, 2012
  • Excellent League of Fudan University, 2012
  • First-class Scholarship, Fudan University, 2012-2010, 2008-2006
  • Excellent Graduate of Fudan University, 2009
  • Excellent League leader of Fudan University, 2007