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2012 中原大學暑期陸生實驗營 :數位電路應用設計


2012-08-08ECE_SummerCamp_FPGA_Design

授課老師 

賴裕昆老師、陳世綸老師

教室

中原大學電機工程學系 篤信355計算機網路實驗室

課程表


DayTopicsReferencesLecture Notes (ppt)In-Class Labs & Homeworks
Week1
1
Introduction to Lab & Design Environment

Introduction to ISE Design Suite (Schematic Entry)

ISE10.1 操作教學

Nexys2 Board Introduction(pdf)
(1) Introduction
(2) Verilog Syntax

Lab1:Add files into a new design.
Nexys2 FPGA Board Introduction

Lab2: 1-bit Buffer with LED (Schematic, Pin assignment, Configure FPGA Device)

HW2:Switch & Leds

2Basic Review Logic Design
Verilog Hardware Description Language Basic Syntax 
Introduction to Nexys™2 Spartan-3E Development Board
7 Segment Led Decoder
(3) Gate-Level

(4) Verification
Lab3(3.1~2)Multiplexer 2-1,
(3.3) Multiplexer 4-1, 
(3.4) 7-Segment Led Decoder

HW3:Switch & 7-Segment LEDs
3
Sequential Logic Design Flip-Flops
Frequency divider & counter design

 



(5) Expressions

(6) Procedural
Lab4Flip-Flop, Register, Up Counter,
Clock Divider

HW4:Pre-Load 8-bit Counter + 7-Segment LEDs
4Pre-load Up/Down counter




(7) Examples



Lab5:De-Bounce, Scan



HW5: 
Pre-Load 8-bit Counter + Debounce + Scan module
 5 Project Alarm Clock
  Lab6: Counter (mod-6, mod-10, mod-60)
HW6: Counter mod-24
 Week2    
 
1

Introduction

Hierarchical Design Priciple

Structural Modeling

 

 

 (0) Introduction

(1) Hierarchical Design Priciple

Lab 1: .Half Adder, Full Adder, 4-bit Ripple-Carry Adder

lab1說明

ha.v fa.v fa_test.v fa-4bit.v fa_4bit_ucf.ucf

 2

Comparison of Software and Hardware

Behavioral Modeling

Verilog Test Bench

 

 (2) Comparison of Software and Hardware

(3) Design Flow & Verilog Test Bench

Lab 2: .ALU, ALU Test Bench

Lab 2 說明

alu.v alu_tb.v

 3Controller Design

Finite State Machine (FSM)

 

(4) Controller Design & Finite State Machine (FSM)

Lab3:Traffic light

trafficLight_tb
 4

Advanced Design

 

 (5) Advanced Design

 Final Project說明


 5 Project Calculator   完整版計算機


評分標準


Labs & Homeworks30%
Projects (1) & (2)
60%
Presentation
10%


Development Boards

Nexys™2 Spartan-3E FPGA Board
    (16MB Micron CellularRAM, 4MB Numonyx StrataFlash, VGA, RS-232, high-speed expansion connector)
    Nexys2 reference manual
    Nexys2 schematic diagrams
    Master UCF file for the Nexys2-500
    Master UCF file for the Nexys2-1200

    Spartan-3E Databook




中原大學電資學院 數位邏輯電路暨系統晶片設計共構實驗室
Xilinx FPGA 晶片設計實驗室
http://ecelab.cycu.edu.tw
子網頁 (1): Homeworks
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