Contact Data

            Prof. Dr.-Ing. Diana Göhringer
 
            Chair for Adaptive Dynamic Systems
           Faculty of Computer Science - Institute of Computer Engineering
             TU Dresden
 
            Universitaetsstrasse 150
            01062 Dresden
            Germany
            Phone: +49-351-463-39625
            Email: diana[dot]goehringer[at]tu-dresden[dot]de
            Web: http://www.tu-dresden.de/inf/ads
        
 
 

Short CV

Diana Göhringer is professor for adaptive dynamic systems at TU Dresden, Germany. From 2013 to 2017 she was  an assistant professor and head of the MCA (application-specific Multi-Core Architectures) research group at the Ruhr-University Bochum (RUB), Germany. Before that she was working as the head of the Young Investigator Group CADEMA (Computer Aided Design and Exploration of Multi-Core Architectures) at the Institute for Data Processing and Electronics (IPE) at the Karlsruhe Institute of Technology (KIT).  From 2007 to 2012, she was a senior scientist at the Fraunhofer Institute of Optronics, System Technologies and Image Exploitation IOSB in Ettlingen, Germany (formerly called FGAN-FOM). In 2011, she received her PhD (summa cum laude) in Electrical Engineering and Information Technology from the Karlsruhe Institute of Technology (KIT), Germany. From 2006 to 2007, she worked for one year as a researcher at the Hardware / Software Co-Design Chair of the University of Erlangen-Nuremberg. She received her master (Dipl.-Ing.) in Electrical Engineering and Information Technology from the Universität Karlsruhe (TH), Germany in 2006. Before that, she did her master thesis at Xilinx Inc. in San Jose, CA, USA in collaboration with the Institute for Information Technology (ITIV) at the Universität Karlsruhe (TH), Germany. She is author and co-author of 1 book, 6 invited book chapters and over 100 publications in international journals, conferences and workshops. Additionally, she serves as technical program committee member in several international conferences and workshops (e.g. DATE, FPL, RAW, ReConFig). She is reviewer and guest editor of several international journals. Furthermore, she is a member of IEEE (http://www.ieee.org), ACM (http://www.acm.org/) and HIPEAC (https://www.hipeac.org/), and an elected member of the Junge Akademie (http://www.diejungeakademie.de) and of the Global Young Faculty (http://www.global-young-faculty.de).
 

Research Interests

Reconfigurable Computing, Multiprocessor Systems-on-Chip (MPSoCs), Networks-on-Chip, Hardware-Software-Codesign, Parallel Programming Models and Runtime Systems.
 

Publications

Edited Books and Conference Proceedings:

  • Santambrogio M D, Göhringer D, Stroobandt D, Mentens N, Nurmi J (Eds. 2017) 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017. IEEE 2017, ISBN 978-9-0903-0428-1.
  • Santambrogio M D, Vaidyanathan R, Goehringer D, Wilton S J E (Eds. 2016) RAW Introduction and Committtees. In Proc. of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshop (IPDPSW), Chicago, USA.
  • Becker J, Eguro K, Göhringer D, Luk W, Santambrogio M D, Vaidyanathan R, Wilton S J E (Eds. 2015) RAW Introduction and Committees. In Proc. of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop (IPDPSW), Hyderabad, India.
  • Ebrahimi M, Göhringer D, Daneshtalab M, Palesi M, Sonntag S, Angiolini F (Eds., 2015) Proceedings of the 3rd International Workshop on Many-core Embedded Systems (Mes'2015) held on June 13, 2015 in conjunction with the 42nd International Symposium on Computer Architecture (ISCA), Portland OR, USA. ACM 2015, ISBN 978-1-4503-3408-2.
  • Goehringer D, Santambrogio M D, Cardoso J M P, Bertels K (Eds., 2014) Reconfigurable Computing: Architectures, Tools, and Applications - 10th International Symposium, ARC 2014, Vilamoura, Portugal, April 14-16, 2014. Proceedings. Lecture Notes in Computer Science 8405, Springer 2014, ISBN 978-3-319-05959-4.
  • Sklavos N, Hübner M, Göhringer D, Kitsos P (Eds., 2013) System-Level Design Methodologies for Telecommunication. Springer.
  • Göhringer D, Hübner M, Becker J (Eds., 2011) Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011, KIT Scientific Publishing, Karlsruhe.
  • Indrusiak L, Göhringer D, Marchesan Almeida G, Gilles S (Eds., 2011) 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip. Proceedings of the 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Montpellier, France, 20-22 June, 2011, IEEE.

Edited Journals:

  • Gorgon M, Cardoso J M P, Göhringer D, Indrusial L S (Eds., 2017) Special issue on design of algorithms and architectures for signal and image processing. Journal of Systems Architecture - Embedded Systems Design 79: 16-17.
  • Goehringer D, Santambrogio M D, Cardoso J M P, Bertels K (Eds., 2015) Guest Editorial ARC 2014. ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9(1):5.
  • Goehringer D (Eds, 2014) Introduction to the Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES). ACM Transactions on Embedded Computing Systems (TECS) 13(5):164.
  • Goehringer D, Sarbazi-Azad H, Stotzka R (Eds., 2014) Special Issue on Networks-on-Chip and Memories for Multicore Architectures. Microprocessors and Microsystems - Embedded Hardware Design 38(4): 253.
  • Goehringer D, Cumplido R (Eds., 2013) Introduction to the special section on 19th reconfigurable architectures workshop (RAW 2012). ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6(2): 6.

      Books:

  • Göhringer D (2011) Flexible Design and Dynamic Utilization of Adaptive Scalable Multi-Core Systems. Dissertation, Karlsruhe Institute of Technology, Verlag Dr. Hut München.

Book Chapter:

  • Kalb T, Kalms L, Göhringer D, Pons C, Muddukrishna A, Jahre M, Ruf B, Schuchert T, Tchouchenkov I, Ehrenstråhle C, Peterson M, Christensen F, Paolillo A, Rodriguez B, Millet P (2019) Developing Low-Power Image Processing Applications with the TULIPP Reference Platform Instance. In Hardware Accelerators in Data Centers, pp.181 - 197, Springer.
  • Keramidas G, Antonopoulos C P, Voros N S, Schwiegelshohn F, Wehner P, Hübner M, Göhringer D, Mariatos E (2019) Accelerating AAL Home Services using Embedded Hardware Components. In RADIO -- Robots in Assisted Living — Unobtrusive, Efficient, Reliable and Modular Solutions for Independent Ageing, pp. 91-112, Springer.
  • Antonopoulos C P, Panagiotou C, Antonopoulos K, Spournias A, Voros N, Schwiegelshohn F, Wehner P, Hübner M, Göhringer D, Ventura R, Fernández A, Stavrinos G, Mariatos E (2019) Integrating Robots and WSN: Communications and Interfacing Aspects. In RADIO -- Robots in Assisted Living — Unobtrusive, Efficient, Reliable and Modular Solutions for Independent Ageing, pp.47-82, Springer.
  • Schwiegelshohn F, Al Kadi M, Wehner P, Smoluk P, Hübner M, Göhringer D (2018) Accelerating Image Processing Algorithms for the RADIO Project's Assistant Robot System. In Kommunikation und Bildverarbeitung in der Automation, pp. 233-245, Springer.
  • Göhringer D (2017) Reconfigurable Multiprocessor Systems-on-Chip, In: Computing Platforms for Software-Defined Radio, pp. 91-105, Springer 2017.
  • Nouri S, Hussain W, Göhringer D, Nurmi J (2017) Design and Implementation of IEEE 802.11 a/g Receiver Blocks on a Coarse-Grained Reconfigurable Array, In: Computing Platforms for Software-Defined Radio, pp. 61-89, Springer 2017.
  • Wehner P, Göhringer D (2016) Internet of Things Simulation using OMNet++ and Hardware in the Loop, In: Components and Services for IoT platforms: Paving the way for IoT standards, Springer 2016.
  • Schwiegelshohn F, Wehner P, Mori J Y, Janßen B, Navarro O, Rettkowski J, Al Kadi M S, Göhringer D, Hübner M (2015) Reconfigurable Processors and Multicore Architectures. In: Reconfigurable Logic: Architectures, Tools, and Applications, CRC Press.
  • Göhringer D, Becker J (2011) New Dimensions in Design Space and Runtime Adaptivity for Multiprocessor Systems through Dynamic and Partial Reconfiguration: The RAMPSoC Approach. In: VLSI 2010 Annual Symposium: Selected Papers, Springer.
  • Göhringer D, Hübner M, Becker J (2010) Adaptive Multiprocessor System-on-Chip Architecture – New degrees of freedom in system design and runtime support. In: Multiprocessor System-on-Chip: Current Trends and the Future, Springer. 

Journals with Peer-Review:

  • Rettkowski J, Göhringer D (2018) ASIR: Application-Specific Instruction-Set Router for NoC-based MPSoCs. Computers, MDPI.
  • Kalms L, Göhringer D (2018) Scalable Clustering and Mapping Algorithm for Application Distribution on Heterogeneous and Irregular FPGA Clusters. Journal of Parallel and Distributed Computing (JPDC).
  • Mendéz Real M, Wehner P, Lapotre V, Göhringer D, Gogniat G (2018) Application Deployment Strategies for Spatial Isolation on Many-core Accelerators. ACM Transactions on Embedded Computing Systems (TECS).
  • Stoychev I, Wehner P, Rettkowski J, Kalb T, Wichert P, Göhringer D (2018) Sensor data fusion in the context of electric vehicles charging stations using a Network-on-Chip. Microprocessors and Microsystems (MICPRO), vol. 56, pp. 134-143.
  • Rettkowski J, Boutros A, Göhringer D (2017) HW/SW Co-Design of the HOG Algorithm on a Xilinx Zynq SoC. Journal of Parallel and Distributed Computing (JPDC), pp. 1-20. 
  • Schwiegelshohn F, Hübner M, Wehner P, Göhringer D (2017) Tackling The New Health-Care Paradigm Through Service Robotics: Unobtrusive, efficient, reliable, and modular solutions for assisted-living environments. IEEE Consumer Electronics Magazine 6(3): pp. 34-41.
  • Hesham S, Rettkowski J, Göhringer D, Abd El Ghany M A (2016) Survey on Real-Time Networks-on-Chip. IEEE Transactions on Parallel and Distributed Systems (TPDS), pp. 1-16.
  • Wehner P, Rettkowski J, Kalb T, Göhringer D (2016) Simulating Reconfigurable Multiprocessor Systems-on-Chip with MPSoCSim. ACM Transactions on Embedded Computing Systems (TECS), pp. 1-24.  
  • Moren K, Göhringer D (2016) A Framework for Accelerating Local Feature Extraction with OpenCL on Multi-Core CPUs and Co-Processors. Journal of Real-Time Image Processing, Springer.
  • Göhringer D, Meder L, Oey O, Becker J (2013) Reliable and Adaptive Network-on-Chip Architectures for Cyber Physical Systems. ACM Transactions on Embedded Computing Systems (TECS), Special Issue on Multiprocessor System-on-Chip for Cyber-Physical Systems DAC 2011.
  • Göhringer D, Meder L, Werner S, Oey O, Becker J, Hübner M (2012) Adaptive Multi-Client Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer and Application Exploration. Hindaw International Journal of Reconfigurable Computing, Special Issue: Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2011).
  • Göhringer D, Hübner M, Nguepi Zeutebouo E, Becker J (2011) Operating System for Runtime Reconfigurable Multiprocessor Systems. Hindawi International Journal of Reconfigurable Computing, Special Issue: Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010).
  • Göhringer D, Obie J, Braga A, Hübner M, Llanos C, Becker J (2011) Exploration of Power-Performance Tradeoffs through Parameterization of FPGA-based Multiprocessor Systems. Hindawi International Journal of Reconfigurable Computing, Special Issue: Selected Papers from the 5th International Workshop on Reconfigurable Communication Centric Systems-on-Chip (ReCoSoC2010).
  • Göhringer D, Hübner M, Perschke T, Becker J (2009) A Taxonomy of Reconfigurable Single/Multi-Processor Systems-on-Chip. Hindawi International Journal of Reconfigurable Computing.
  • Braun L, Göhringer D, Perschke T, Schatz V, Hübner M, Becker J (2009) Adaptive real time image processing exploiting two dimensional reconfigurable architecture. Journal of Real-Time Image Processing, vol. 4, no. 2, pp.109-125, Springer.
  • Fekete S, van der Veen J, Ahmadinia A, Göhringer S, Majer M, Teich T (2008) Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 16, no. 9, pp. 1210-1219.
  • Angermeier J, Göhringer D, Majer M, Teich J, Fekete S, van der Veen J (2007) The Erlangen Slot Machine – A Platform for Interdisciplinary Research in Reconfigurable Computing. IT – Information Technology Journal, vol. 49, no. 3, pp. 143-148, Oldenbourg Wissenschaftsverlag.

International Conferences and Workshops with Peer-Review:

2018

  • Akgün G, Khan H, Elshimy M A, Göhringer D (2018) Dynamic tunable and reconfigurable hardware controller with EKF-based state reconstruction through FPGA-in the loop. In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1-6, Cancun, Mexico. (Accepted)
  • Kalms L, Ibrahim H, Göhringer D (2018) Full-HD Accelerated and Embedded Feature Detection Video System with 63fps using ORB for FREAK. In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1-6, Cancun, Mexico. (Accepted)
  • Etman R W, Hesham S, Hofmann K, Abd El Ghany M A, Göhringer D (2018) Analysis of Synchronous-Asynchronous NoC for the Dark Silicon Era. In Proc. of the IEEE Nordic Circuits and Systems Conference (NORCAS), pp.1-6, Tallinn, Estonia. (Accepted)
  • Podlubne A, Haase J, Kalms L, Akgün G, Ali M, Khan H, Kamal A, Göhringer D (2018) Low Power Image Processing Applications on FPGAs using Dynamic Voltage Scaling and Partial Reconfiguration. In Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), pp. 1-6, Porto, Portugal.
  • Khan H, Göhringer D (2018) Cycle-Accurate and Cycle-Reproducible Debugging of Embedded Designs using Artificial Intelligence. In Proc. of the International Conference on Field Programmable Logic and Applications (FPL), pp. 1-2, Dublin, Ireland.
  • Batra A, Wiemeler M, Kreul T, Göhringer D, Kaiser T (2018) A Massive MIMO Signal Processing Architecture for GHz to THz Frequencies. In Proc. of the 1st International Workshop on Mobile Terahertz Systems, pp. 1-5, Velen, Germany.
  • Moren K, Göhringer D (2018) Automatic mapping for OpenCL-Programs on CPU/GPU Heterogeneous Platforms. In Proc. of the International Conference on Computational Science (ICCS), pp. 1-14, Wuxi, China.
  • Antonopoulos C, Keramidas G, Voros N S, Hübner M, Schwiegelshohn F, Göhringer D, Dagioglou M, Stavrinos G (2018) Robots in assisted living environments as an unobtrusive, efficient, reliable and modular solution for independent ageing: The RADIO Experience. In Proc. of the 14th International Symposium on Applied Reconfigurable Computing (ARC), pp. 1-12, Santorini, Greece.
  • Sadek A, Muddukrishna A, Kalms L, Djupdal A, Podlubne A, Paolillo A, Göhringer D, Jahre M (2018) Supporting Utilities for Heterogeneous Embedded Image Processing Platforms (STEHM): An Overview. In Proc. of the 14th International Symposium on Applied Reconfigurable Computing (ARC), pp. 1-12, Santorini, Greece.
  • Rettkowski J, Göhringer D (2018) High-Level Synthesis of Software-defined MPSoCs. In Proc. of the 14th International Symposium on Applied Reconfigurable Computing (ARC), pp. 1-12, Santorini, Greece.
  • Khan H, Kamal A, Göhringer D (2018) An Intrusive Dynamic Reconfigurable Cycle-accurate Debugging System for Embedded Processors.  In Proc. of the 14th International Symposium on Applied Reconfigurable Computing (ARC), pp. 1-12, Santorini, Greece.
  • Rettkowski J, Göhringer D (2018) Automated Design of Relocatable Partial Bitstreams with RePaBit. In Proc. of the University Booth of the Design, Automation and Test in Europe (DATE), pp. 1, Dresden, Germany. (abstract only)
  • Wagner J, Barowski J, Kalb T, Göhringer D, Rolfes I (2018) Hardware-accelerated Embedded SAR Processor for Realtime FMCW Radar Applications. In Proc. of the German Microwave Conference(GeMiC), pp. 1-4 , Freiburg, Germany.
  • Kalms L, Hebbeler T, Göhringer D (2018) Automatic OpenCL Code Generation from LLVM-IR using Polyhedral Optimization. In Proc. of the PARMA-DITAM 2018 Workshop, pp. 1-6, Manchester, UK.

2017

  • Rettkowski J, Göhringer D (2017) Application-Specific Processing using High-Level Synthesis for Networks-on-Chip. In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1-7, Cancun, Mexico.
  • Hesham S, Göhringer D, Abd El Ghany M A (2017) A Call-up for Circuit-Switched NoCs in the Dark-Silicon Era. In Proc. of the IEEE Nordic Circuits and Systems Conference (NORCAS), pp. 1-6, Linköping, Sweden.
  • Kalms L, Rettkowksi J, Hamme M, Göhringer D (2017) Robust Lane Recognition for Autonomous Driving. In Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), pp. 1-6, Dresden, Germany.
  • Kalms L, Göhringer D (2017) Exploration of OpenCL for FPGAs using SDAccel and Comparison to GPUs and Multicore CPUs.In Proc. of the International Conference on Field Programmable Logic and Applications (FPL), pp. 1-4, Ghent, Belgium.
  • Kahn H, Rettkowski J, Eldafrawy M, Göhringer D (2017) An Event-based Network-on-Chip Debugging System for FPGA-based MPSoCs. In Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVI), pp. 1-8, Samos, Greece.
  • Rettkowski J, Göhringer D (2017) Data Stream Processing in Networks-on-Chip. In Proc. of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 1-6, Bochum, Germany.
  • Keramidas G, Voros N, Antonopoulos C, Schwiegelshohn F, Wehner P, Göhringer D, Mariatos E (2017) Profile-driven Power Optimizations for AAL Robots: Maximizing Robots Idle Time by Offloading Monitoring Workload to Dedicated Hardware Components. In Proc. of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 1-6, Bochum, Germany.
  • Kalms L, Khaled M, Göhringer D (2017) Accelerated Embedded AKAZE Feature Detection Algorithm on FPGA. In Proc. of the International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), pp. 1-6, Bochum, Germany. (Best Paper Award)
  • Nouri S, Rettkowski J, Göhringer D, Nurmi J (2017) HW/SW Co-Design of an IEEE 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis. In Proc. of the International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), pp. 1-6, Bochum, Germany.
  • Kahn H, Grimm T, Hübner M, Göhringer D (2017) Access Network Generation for Efficient Debugging of FPGAs. In Proc. of the International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), pp. 1-6, Bochum, Germany.
  • Khan H, Göhringer D (2017) FPGA Debugging by a Device Start and Stop Approach. In Proc. of the 13th International Symposium on Applied Reconfigurable Computing (ARC), pp. 1-12, Delft, The Netherlands. 

2016

  • Kalb T, Göhringer D (2016) Enabling Dynamic and Partial Reconfiguration in Xilinx SDSoC. In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1-7, Cancun, Mexico.
  • Rettkowski J, Friesen K, Göhringer D (2016) RePaBit: Automated Generation of Relocatable Partial Bitstreams for Xilinx Zynq FPGAs. In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1-8, Cancun, Mexico.
  • Khan H, Göhringer D (2016) FPGA Debugging by a Device Start and Stop Approach. In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1-6, Cancun, Mexico.
  • Stoychev I, Wehner P, Rettkowksi J, Kalb T, Göhringer D (2016) Sensor Data Fusion with MPSoCSim in the Context of Electric Vehicle Charging Stations. In Proc. of the IEEE Nordic Circuits and Systems Conference (NORCAS), pp. 1-6, Copenhagen, Denmark.
  • Janßen B, Wehner P, Göhringer D, Hübner M (2016) Development of Advanced Driver Assistance Systems using LabVIEW and a Car Simulator. In Proc. of the 12th Workshop on Embedded and Cyber-Physical Systems Education (WESE) at ESWeek, pp. 1-6, Pittsburg, PA, USA.
  • Kalb T, Kalms L, Göhringer D, Pons C, Marty F, Muddukrishna A, Jahre M, Kjeldsberg P G, Ruf B, Schuchert T, Tchouchenkov I, Ehrenstråhle C, Peterson M, Christensen F, Paolillo A, Lemer C, Rodriguez B, Bernard G, Duhem F, Millet P (2016) TULIPP: Towards Ubiquitous Low-power Image Processing Platforms. In Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XV), pp. 1-6, Samos, Greece.
  • Schwiegelshohn F, Wehner P, Werner F, Göhringer D, Hübner M (2016) Enabling Indoor Object Localization through Bluetooth Beacons on the RADIO Robot Platform. In Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XV), pp. 1-6, Samos, Greece.
  • Menzéz Real M, Wehner P, Rettkowski J, Migliore V, Lapotre V, Göhringer D, Gogniat G (2016) MPSoCSim extension: An OVP Simulator for the Evaluation of Cluster-based Multicore and Many-core architectures. In Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XV), pp. 1-6, Samos, Greece. (Accepted)
  • Mendéz Real M, Wehner P, Migliore V, Lapotre V, Göhringer D, Gogniat G (2016) Dynamic Spatially Isolated Secure Zones for NoC-based Many-core Accelerators. In Proc. of the 11th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), pp. 1-6, Tallinn, Estonia. (Accepted)
  • Hesham S, Göhringer D, Abd El Ghany M A (2016) ARTNoCs: An Evaluation Framework for Hardware Architectures of Real-Time NoCs. In Proc. of the IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), pp. 259-264, Chicago, USA. (Nominated for the Best Poster Award)
  • Rettkowski J, Wehner P, Cutiscev E, Göhringer D (2016) LinROS: A Linux-based Runtime System for Reconfigurable MPSoCs. In Proc. of the IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), pp. 206-216, Chicago, USA.
  • Kalms L, Göhringer D (2016) Clustering and Mapping Algorithm for Application Distribution on a Scalable FPGA Cluster. In Proc. of the IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), pp. 105-113, Chicago, USA. (Best Paper Award)
  • Keramidas G, Antonopoulos C, Voros N S, Schwiegelshohn F, Wehner P, Rettkowski J, Göhringer D, Hübner M, Konstantopoulos S, Giannakopoulos T, Karkaletsis V, Mariatos V (2016) Computation and Communication Challenges to Deploay Robots in Assisted Living Environments, In Proc. of the Design, Automation and Test in Europe Conference (DATE), pp. 1-6, Dresden, Germany. 

2015

  • Rettkowski J, Boutros A, Göhringer D (2015) A Real-Time Pedestrian Detection on a Xilinx Zynq FPGA using the HOG Algorithm, In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico. (Best Application Paper Award)
  • Ahmed A, Hesham S, Abd El Ghany M A, Göhringer D, Hofmann K (2015) Online Bicast Allocation Algorithm for Contention-free-Routing NoCs. In Proc. of the IEEE International Conference on Electronics, Circuits, & Systems, Cairo, Egypt. (Being one of the Top 10 Student Paper Submissions)
  • Schwiegelshohn F, Wehner P, Rettkowski J, Göhringer D, Hübner M, Keramidas G, Antonopoulos C, Voros N S (2015) A Holistic Approach for Advancing Robots in Ambient Assisted Living Environments, In Proc. of the 18th International IEEE Conference on Computational Science and Engineering (CSE 2015), Porto, Portugal. 
  • Rettkowski J, Gburek D, Göhringer D (2015) Robot Navigation based on an Efficient Combination of an Extended A* algorithm, Bird's Eye View and Image Stitching, In Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), Cracow, Poland. 
  • Wehner P, Rettkowski J, Kleinschmidt T, Göhringer D (2015) MPSoCSim: An extended OVP Simulator for Modeling and Evaluation of Network-on-Chip based heterogeneous MPSoCs, In Proc. of the 3rd Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES) as part of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XV), Samos, Greece.
  • Mentens N, Vandorpe J, Vliegen J, Braeken A, Da Silva B, Touhafi A, Knappmann S, Kern A, Rettkowski J, Al Kadi M S, Göhringer D, Hübner M (2015) DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications, In Proc. of the 11th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Bochum, Germany.
  • Antonopoulos C, Keramidas G, Voros N S, Hübner M, Göhringer D, Dagioglou M, Giannakopoulos T Konstantopoulos S, Karkaletsis V (2015) Robots in assisted living environments as an unobtrusive, efficient, reliable and modular solution for independent ageing: The RADIO perspective, In Proc. of the 11th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Bochum, Germany.
  • Rettkowski J, Wehner P, Schuelper M, Göhringer D (2015) A Flexible Software Framework for Dynamic Task Allocation on MPSoCs evaluated on an Automotive Context, In Proc. of the 11th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Bochum, Germany.
  • Hesham S, Rettkowski J, Göhringer D, Abd El Ghany M A (2015) Survey on Real-Time Network-on-Chip Architectures, In Proc. of the 11th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Bochum, Germany.

2014

  • Wehner P, Schwiegelshohn F, Göhringer D, Hübner M (2014) Development of Driver Assistance Systems using virtual Hardware-in-the-Loop, In Proc. of the International Symposium on Integrated Circuits (ISIC), Singapore.
  • Rettkowski J, Göhringer D (2014) RAR-NoC: A Reconfigurable and Adaptive Routable Network-on-Chip for FPGA-based Multiprocessor Systems, In Proc. of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico.
  • Wehner P, Göhringer D (2014) Parallel and Distributed Simulation of Networked Multi-Core Systems, In Proc. of the International Symposium on System-on-Chip (SoC), Tampere, Finland.
  • Moren K, Göhringer D, Perschke T (2014) Accelerating Local Feature Extraction using OpenCL on Heterogeneous Platforms, In Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), Madrid, Spain.
  • Janßen B, Mori J Y, Navarro O, Göhringer D, Hübner M (2014) Future Trends on Adaptive Processing Systems, In Proc. of the 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC), Milan, Italy.
  • Göhringer D (2014) Reconfigurable Multiprocessor Systems: Handling Hydras Heads – A Survey, ACM SIGARCH Computer Architecture News - HEART, vol. 42, no. 4, pp. 39-44.
  • Wehner P, Piberger C, Göhringer D (2014) Using JSON to manage Communication between Services in the Internet of Things, In Proc. of the 9th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Montpellier, France.
  • Göhringer D , Tepelmann J (2014) An Interactive Tool based on Polly for Detection and Parallelization of Loops. In Proc. of the PARMA-DITAM 2014 Workshop, Vienna, Austria. 

2013 

  • Al Kadi M S, Rudolph P, Göhringer D, Hübner M (2013) Dynamic and partial reconfiguration of Zynq 7000 under Linux. In Proc. of the International Conference on ReConFigurable Computing and FPGA, Cancun, Mexico.
  • Wehner P, Göhringer D (2013) Evaluation of Driver Assistance Systems with a Car Simulator using a Virtual and a Real FPGA Platform. In Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), Cagliari, Italy.
  • Wehner P, Göhringer D, (2013) Design of Driver Assistance Systems using a Virtual Development Platform and a Car Simulator. In Proc. of the 16th Edition of the Sophia Antipolis Microelectronics Conference (SAME), Sophia Antipolis, France. (Best Demo Contest Award)
  • Wehner P, Ferger M, Göhringer D, Hübner M (2013) Rapid Prototyping of a Portable HW/SW Co-Design on the Virtual Zynq Platform using SystemC. In Proc. of the 26th IEEE International Systems-on-Chip Conference (SOCC), Erlangen, Germany.

2012 

  • Oey O, Werner S, Göhringer D, Stuckert A, Becker J, Hübner M (2012) Virtualization of Heterogeneous and Adaptive Multi-Core /Multi-Board Systems. in Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), Karlsruhe, Germany.
  • Becker J, Huebner M, Stripf T, Derrien S, Menard D, Sentieys O, Rauwerda G, Sunesen K, Kavvadias N, Masselos K, Goulas G, Alefragis P, Voros N S, Kritharidis D, Mitas N, Goehringer D (2012) From Scilab To High Performance Embedded Multicore Systems – The ALMA Approach. In Proc. of the 15th Euromicro Conference on Digital System Design (DSD), Izmir, Turkey.
  • Hübner M, Göhringer D, Tradowsky C, Henkel J (2012) Adaptive Processor Architecture - Invited Paper. In Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII), Samos, Greece, July.
  • Goulas G, Alefragis P, Voros N S, Valouxis C, Gogos C, Kavvadias N, Dimitroulakos G, Masselos K, Goehringer D, Derrien S, Menard D, Sentieys O, Huebner M, Stripf T, Oey O, Becker J, Rauwerda G, Sunesen K, Kritharidis D, Mitas N (2012) From Scilab to Multicore Embedded Systems: Algorithms and Methodologies In Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII), Samos, Greece, July.
  • Stripf T, Oey O, Bruckschloegl T, Koenig R, Becker J, Rauwerda G, Sunesen K, Perschke T, Goehringer D, Huebner M, Goulas G, Alefragis P, Voros N S, Derrien S, Menard D, Sentieys O, Kavvadias N, Dimitroulakos G, Masselos K, Kritharidis D, Mitas N (2012) Flexible Approach for Compiling Scilab to Reconfigurable Multi-Core Embedded Systems. In Proc. of the 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, UK.
  • Göhringer D, Chemaou M, Hübner M (2012) On-chip monitoring for adaptive heterogeneous multicore systemsIn Proc. of the 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, UK.
  • Oey O, Werner S, Göhringer D, Hübner M, Becker J (2012) Virtualized Distributed Computing for Heterogeneous Adaptive Multi-Core Systems. In Proc. of the University Booth of the Design, Automation and Test in Europe (DATE), Dresden, Germany. 
  • Werner S, Oey O, Göhringer D, Hübner M, Becker J (2012) Virtualized On-Chip Distributed Computing for Heterogeneous Reconfigurable Multi-Core SystemsIn Proc. of the Design, Automation and Test in Europe (DATE), Dresden, Germany.

2011

  • Göhringer D, Meder L, Hübner M, Becker J (2011) Adaptive Multi-Client Network-on-Chip Memory. In Proc. of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun, Mexico. (Best Paper Award)
  • Hübner M, Tradowsky C, Göhringer D, Braun L, Thoma F, Henkel J, Becker J (2011) Dynamic Processor Reconfiguration. In Proc. of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun, Mexico.
  • Göhringer D, Werner S, Hübner M, Becker J (2011) RAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC. In Proc. of the International Conference on Field Programmable Logic and Applications (FPL), Chania, Crete, Greece.
  • Göhringer D, Oey O, Hübner M, Becker J (2011) Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip. In Proc. of 11th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI), Samos, Greece.
  • Göhringer D, Birk M, Dasse-Tiyo Y, Ruiter N, Hübner M, Becker J (2011) Reconfigurable MPSoC versus GPU: Performance, Power and Energy Evaluation. In Proc. of the 9th International Conference  on Industrial Informatics (INDIN), Lisbon, Portugal. 
  • Thoma F, Hübner M, Göhringer D, Yilmaz H Ü, Becker J (2011) Power and Performance Optimization through MPI supported Dynamic Voltage and Frequency Scaling. In Proc of the 3rd MARC Symposium, Ettlingen, Germany. 
  • Göhringer D, Birk M, Hübner M, Becker J (2011) High-Level Design for FPGA-based Multiprocessor Accelerators. In Proc. of the DATE W2: Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing (DATE), Grenoble, France.

2010

  • Braga A L S, Göhringer D, Llanos C H, Obie J, Hübner M, Becker J (2010) Performance, Accuracy, Power Consumption and Resource Utilization Analysis for Hardware / Software realized Artificial Neural Networks. In Proc. of the International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA), Liverpool, UK.
  • Göhringer D, Hübner M, Hugot-Derville L, Becker J (2010) Message Passing Interface Support for the Runtime Adaptive Multi-ProcessorSystem-on-Chip RAMPSoC. In Proc. of the International Conference on Embedded ComputerSystems: Architectures, Modeling and Simulation (SAMOS X), Samos, Greece.
  • Göhringer D, Becker J (2010) FPGA-based Runtime Adaptive Multiprocessor Approach for Embedded High Performance Computing Applications. In Proc. of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Lixouri, Cephalonia, Greece. (Best PhD Paper Award)
  • Göhringer D, Obie J, Hübner M, Becker J (2010) Impact of Task Distribution, Processor Configurations and Dynamic Clock Frequency Scaling on the Power Consumption of FPGA-based Multiprocessors. In Proc. of the 5th International Workshop on Reconfigurable Communication Centric Systems-on-Chip (ReCoSoC),  Karlsruhe, Germany.
  • Göhringer D, Hübner M, Benz M, Becker J (2010) A Design Methodology for Application Partitioning and Architecture Development ofReconfigurable Multiprocessor Systems-on-Chip. In Proc. of the 18th International IEEE Symposium on Field-Programmable Custom Computing Machines” (FCCM), Charlotte, USA.
  • Göhringer D, Becker J (2010) High Performance Reconfigurable Multi-Processor-Based Computing on FPGAs. In Proc. of the IEEE International Symposium Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA.
  • Göhringer D, Hübner M, Nguepi Zeutebouo E, Becker J (2010) CAP-OS: Operating System for Runtime Scheduling, Task Mapping and Resource  Management on Reconfigurable Multiprocessor Architectures. In Proc. of the IEEE International Symposium Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA.
  • Hübner M, Göhringer D, Noguera J, Becker J (2010) Fast dynamic and partial reconfiguration Data Path with low Hardware overhead on Xilinx FPGAs. In Proc. of the IEEE International Symposium Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA .
  • Göhringer D, Hübner M, Benz M, Becker J (2010) Semi-Automatic Toolchain for Reconfigurable Multiprocessor Systems-on-Chip: ArchitectureDevelopment and Application Partitioning. In Proc. of the Int. Symp. on Field-Programmable Gate Arrays (FPGA), Monterey, USA.

2009

  • Göhringer D, Luhmann J, Becker J (2009) GenerateRCS: A High-Level Design Tool for Generating Reconfigurable Computing Systems. InProc. of the IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Florianopolis, Brazil.
  • Göhringer D, Liu B, Hübner M, Becker J (2009) Star-Wheels Network-on-Chip featuring a self-adaptive mixed topology and a synergy of acircuit- and a packet-switching communication protocol. In Proc. of the International Conference on Field Programmable Logic and Applications (FPL), Prague, Czech Republic.
  • Göhringer D, Becker J (2009) Multi-Processor-based High Performance Computing utilizing dynamic reconfigurable Hardware. In Proc. of the Design, Automation and Test in Europe (DATE), Nice, France.

   2008

  • Göhringer D, Hübner M, Perschke T, Becker J (2008) New Dimensions for Multiprocessor Architectures: On Demand Heterogeneity,Infrastructure and Performance through Reconfigurability: The RAMPSoC Approach. In Proc. of the International Conference on Field Programmable Logic and Applications (FPL), pp. 495-498, Heidelberg, Germany.
  • Hübner M, Braun L, Göhringer D, Becker J (2008) Run-Time Reconfigurable Adaptive Multilayer Network-on-Chip for FPGA-based Systems. In Proc. of the IEEE International Symposium Parallel and Distributed Processing (IPDPS), pp. 1-6, Miami,Florida, USA.
  • Göhringer D, Hübner M, Schatz V, Becker J (2008) Runtime Adaptive Multi-Processor System-on-Chip: RAMPSoC. In Proc. of the IEEE International Symposium Parallel and Distributed Processing (IPDPS), pp. 1-7, Miami, Florida, USA.

2007

  • Fekete S, van der Veen J, Angermeier J, Göhringer D, Majer M, Teich J (2007) Scheduling and communication-aware mapping of HW-SW modules for dynamically and partially reconfigurable SoC architectures. In Proc. of the Dynamically Reconfigurable Systems Workshop (DRS), Zurich, Switzerland.

2006

  • Göhringer D, Majer M, Teich J (2006) Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine. In Proc. of the Dagstuhl Seminar N°06141 on Dynamically Reconfigurable Architectures, Dagstuhl, Germany.