Publications

2014
  • Devesh Tiwari and Yan Solihin. MapReuse: Reusing Computation in an In-Memory MapReduce
    System
    , Proc. of the International Conference on Parallel and Distributed Systems (IPDPS), Phoenix, May 2014. (pdf)
  • Amro Awad and Yan Solihin. STM : Cloning the Spatial and Temporal Memory Access Behavior, Proc. of the International Symposium on High Performance Computer Architecture (HPCA), Orlando, Feb 2014. (pdf)
2013
  • Ahmad Samih, Xiaowei Jiang and Yan Solihin. Flexible Capacity Partitioning in Many-Core Tiled CMPs, to appear in the Proc. of International symposium on Cluster, Cloud, and Grid Computing (CCGrid), Delft, Netherland, May 2013.(pdf)
  • Devesh Tiwari, Simona Boboila, Sudharshan Vazhkudai, Youngjae Kim, Xiaosong Ma, Peter Desnoyers, and Yan Solihin, Active Flash: Towards Energy-Efficient, In-Situ Data Analytics on Extreme-Scale Machines, to appear 11th USENIX Conference on File and Storage Technologies (FAST), San Jose, Feb 2013. 
  • Yipeng Wang and Yan Solihin. XAMP: an eXtensible Analytical Model Platform, to appear in Proc. of the International Symposium on Performance Analysis of Software and Systems (ISPASS), Austin, TX, April 2013.
  • Ahmad Samih, Ren Wang, Anil Krishna, Christian Maciocco, and Yan Solihin. Energy-Efficient Interconnect via Router Parking, in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), Feb 2013. (pdf) (slides)
2012
  • Ahmad Samih, R. Wang, C. Tai, and Yan Solihin. Evaluating Dynamics and Bottlenecks of Memory Sharing in Cluster Systems, Proc. of the International symposium on Cluster, Cloud, and Grid Computing (CCGrid), May 2012. Invited for special issue of FGCS Journal. (pdf)
  • Devesh Tiwari and Yan Solihin. Modeling and Analyzing Key Performance Factors of Shared Memory MapReduce, Proc. of International Conference on Parallel and Distributed Systems (IPDPS), May 2012. Best Paper Award Finalist. (pdf) (slides)
  • Anil Krishna, Ahmad Samih, and Yan Solihin. Data Sharing in Multi-Threaded Applications and Its Impact on Chip Design, in the Proc. of  IEEE International Symposium on Performance Analysis of System and Software (ISPASS), April 2012. (pdf
  • Devesh Tiwari and Yan Solihin. Architectural Characterization and Similarity Analysis of Sunspider and Google's V8 Javascript Benchmarks, in the Proc. of IEEE International Symposium on Performance Analysis of System and Software (ISPASS), April 2012. (pdf(slides)
    • Ganesh Balakrishnan and Yan Solihin. WEST: Cloning Data Cache Behavior using Stochastic Traces, in the Proc. of International Symposium on High-Performance Computer Architecture (HPCA), Feb 2012. (pdf)  (slides)

      2011

      • Ahmad Samih and Yan Solihin. A Collaborative Memory System for High-Performance and Cost-Effective Clustered Architectures, published at the workshop of Architecture and Systems for Big Data (ASBD), held in conjunction with Parallel Architecture and Compilation Techniques (PACT), 2011. (pdf)
      • Ahmad Samih, Anil Krishna, and Yan Solihin. Evaluating Placement Policies for Managing Capacity Sharing in CMP Architectures with Private Caches, Accepted for publication at the ACM Transactions on Architecture and Code Optimization (TACO), 2011. (pdf)  
      • Fang Liu and Yan Solihin. Joint Exploration of Hardware Prefetching and Bandwidth Partitioning in Chip-Multiprocessors7th Annual Workshop on Modeling, Benchmarking, and Simulation (MoBS), held in conjunction with the International Symposium on Computer Architecture (ISCA), San Jose, June 2011. (pdf
      • Siddhartha Chhabra and Yan Solihin. i-NVMM: A Secure Non-Volatile Main Memory System with Incremental Encryption, Proc. of the International Symposium on Computer Architecture (ISCA), San Jose, June 2011. (pdf) (ppt slides)
      • Siddhartha Chhabra, Brian Rogers, Yan Solihin, and Milos Prvulovic. SecureME: a Hardware-Software Approach to Full System Security, Proc. of the International Conference on Supercomputing (ICS), Tucson, May-June 2011. (pdf) (slides to follow)
      • Fang Liu and Yan Solihin. Studying the Impact of Hardware Prefetching and Bandwidth Partitioning in Chip-Multiprocessors, Proc. of the ACM SIGMETRICS 2011 International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), San Jose, June 2011. (pdf)  (ppt slides)
      • Anil Krishna, Ahmad Samih, and Yan Solihin. Impact of Data Sharing on CMP design: A study based on Analytical Modeling, 2nd workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHac), held in conjunction with the International Symposium on High-Performance Computer Architecture (HPCA), 2011. (pdf)
      • Sanghoon Lee, Devesh Tiwari, Yan Solihin and James Tuck. HAQu: Hardware Accelerated Queueing for Fine-Grained Threading on a Chip Multiprocessor,  Proc. of the 17th International Symposium on High-Performance Computer Architecture (HPCA), 2011. (pdf)
      • Xiaowei Jiang and Yan Solihin. Architectural Framework for Supporting Operating System Survivability, Proc. of the 17th International Symposium on High-Performance Computer Architecture (HPCA), 2011.(pdf) (ppt slides)
      • Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar Iyer, Srihari Makineni, Donald Newell, Yan Solihin and Rajeev Balasubramonian. CHOP:Integrating DRAM Caches for CMP Server PlatformsIEEE Micro Top Picks, 31(1), page 99-108, January/February, 2011. (pdf)

      2010 
      • Siddhartha Chhabra and Yan Solihin. Green Secure Processors: Towards Power-Efficient Secure Processor Design, Transactions on Computational Science, Lecture Notes in Computer Science (LNCS), Special Issue on Security in Computing, November 2010.(pdf)

      • Fang Liu, Yan Solihin. Understanding the Behavior and Implications of Context Switch Misses, ACM Transactions on Architecture and Code Optimization (TACO), 7(4): 21, December 2010. (pdf

      • Fei Guo, Yan Solihin, Li Zhao, and Ravi Iyer. Quality of Service Shared Cache Management in Chip Multiprocessor Architecture,  ACM Transactions on Architecture and Code Optimization (TACO), 7(3): 14, March 2010.
      • Devesh Tiwari, Sanghoon Lee, James Tuck and Yan Solihin. MMT: Exploiting Fine-Grained Parallelism in Dynamic Memory Management  Proc. of  24th International Parallel & Distributed Processing Symposium (IPDPS) Track-Software, April 2010. (pdf) (ppt slides)

      • Siddhartha Chhabra, Yan Solihin, Reshma Lal and Matthew Hoekstra. An Analysis of Secure Processor Architectures, Transactions on Computational Science VII, Lecture Notes in Computer Science (LNCS), issue 5890, pp. 101-121, February 2010 (pdf)

      • Siddhartha Chhabra and Yan Solihin. Defining Anomalous Behavior for Phase Change Memory, Workshop on the Use of Emerging Storage and Memory Technologies (WEST 2010) Held in conjunction with the International Symposium on High-Performance Computer Architecture (HPCA), Bangalore, January 2010. (pdf)(ppt slides)
      • Ahmad Samih, Anil Krishna, and Yan Solihin. Understanding The Limits of Capacity Sharing in CMP Private Caches, Proc. of CMP-MSI Workshop held in conjunction with the International Symposium on High-Performance Computer Architecture (HPCA), January 2010.(pdf)
      • Fang Liu, Xiaowei Jiang, and Yan Solihin. Understanding How Off-Chip Memory Bandwidth Partitioning in Chip Multiprocessors Affects System Performance, Proc. of the 16th International Symposium on High-Performance Computer Architecture (HPCA), Bangalore, Indian, January 2010. (pdf) (ppt slides
      • Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar Iyer, Srihari Makineni, Donald Newell, Yan Solihin and Rajeev Balasubramonian. CHOP:Adaptive Filter-Based DRAM Caching for CMP Server Platforms, Proc. of the 16th International Symposium on High-Performance Computer Architecture (HPCA), January 2010. (pdf)(ppt)
      2009
      • Siddhartha Chhabra, Brian Rogers and Yan Solihin. SHIELDSTRAP: Making Secure Processors Truly Secure, International Conference on Computer Design (ICCD-27), Lake Tahoe, California, October, 2009. (pdf)(ppt slides)
      • Jaejin Lee, Changhee Jung, Daeseob Lim, Yan Solihin. Prefetching with Helper Threads for Loosely-Coupled Multiprocessor Systems, IEEE Transactions on Parallel and Distributed System (TPDS), September, 2009. (pdf)
      • Devesh Tiwari, Sanghoon Lee, James Tuck and Yan Solihin. Memory Management Thread for Heap Intensive Sequential Applications,Proc. of 10th MEDEA Workshop held in conjunction with Conference on Parallel Architectures and Compilation Techniques (PACT), Raleigh, September 2009. (pdf)(ppt slides) (ACM Digital Library Link)
      • Xiaowei Jiang, Yan Solihin, Li Zhao and Ravishankar Iyer. Architecture Support for Improving Bulk Memory Copying and Initialization Performance., Proc. of International Conference on Parallel Architectures and Compilation Techniques (PACT), Raleigh, September 2009. (pdf) (ppt slides)
      • Siddhartha Chhabra and Yan Solihin. sProcVisor: A Hardware-Software Approach to Full System Security, Workshop on the Interaction between Operating Systems and Computer Architecture ( WIOSCA 2009 ) Held in conjunction with the 2009 International Symposium on Computer Architecture (ISCA-36), Austin, June 2009. (pdf)(ppt)
      • Siddhartha Chhabra and Yan Solihin. SHIELDSTRAP: A Secure Bootstrap Architecture, Workshop on the Interaction between Operating Systems and Computer Architecture ( WIOSCA 2009 ) Held in conjunction with the 2009 International Symposium on Computer Architecture (ISCA-36), Austin, June 2009. (pdf)(ppt slides)
      • Brian Rogers, Anil Krishna, Gordon Bell, Ken Vu, Xiaowei Jiang and Yan Solihin. Scaling the Bandwidth Wall: Challenges in and Avenues for CMP Scaling, Proc. of International Symposium on Computer Architecture (ISCA), Austin, June 2009. (pdf)(ppt slides)
      • Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic. MemTracker: An Accelerator for Memory Debugging and Monitoring, ACM Transactions on Architecture and Code Optimization (TACO), June 2009. (pdf
      • Devesh Tiwari and Yan Solihin. Explicit Sequential Programming for Implicit Parallel Performance on Many Cores, Wild and Crazy Ideas Session (WACI) International Symposium for Programming Languages and Operating Systems (ASPLOS), Washington DC, March 2009. (pdf)(ppt slides)
      • Siddhartha Chhabra, Brian Rogers, Yan Solihin and Milos Prvulovic. Making Secure Processors OS- and Performance-Friendly, ACM Transactions on Architecture and Code Optimization (TACO), March, 2009. (pdf)
      2008
      • Mazen Kharbutli and Yan Solihin Counter-Based Cache Replacement and Bypassing Algorithms., IEEE Trans. on Computers 57(4): 433-447 (TC), 2008. (pdf)
      • Fang Liu, Fei Guo, Seongbeom Kim, Abdulaziz Eker and Yan Solihin. Characterizing and Modeling the Behavior of Context Switch Misses, Proc. of  the 17th International Conference on Parallel Architecture and Compilation Techniques (PACT), Toronto, Canada, Oct 2008. (pdf) (ppt slides)
      • Guru Venkataramani, Ioannis Doudalis, Yan Solihin and Milos Prvulovic. FlexiTaint: A Programmable Accelerator for Dynamic Taint Propagation, Proc. of  the 14th International Symposium on High Performance Computer Architecture (HPCA), Feb 2008. (pdf)
      • Brian Rogers, Chenyu Yan, Siddhartha Chhabra, Milos Prvulovic and Yan Solihin. Single-Level Integrity and Confidentiality Protection for Distributed Shared Memory Multiprocessors, Proc. of  the 14th International Symposium on High Performance Computer Architecture (HPCA), Feb 2008. (pdf)
      2007
      • Fei Guo, Yan Solihin, Li Zhao and Ravishankar Iyer. A Framework for Providing Quality of Service in Chip Multi-Processors, Proc. of  the 40th Annual IEEE/ACM Symposium on Microarchitecture (MICRO), Dec 2007. (pdf) (ppt slides)
      • Brian Rogers, Siddhartha Chhabra, Yan Solihin and Milos Prvulovic. Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS– and Performance– Friendly, Proc. of  the 40th Annual IEEE/ACM Symposium on Microarchitecture (MICRO), Dec 2007. (pdf)
      • Ravishankar Iyer, Li Zhao, Fei Guo, Yan Solihin, Srihari Markineni, Don Newell, Rameshi Illikkal, Lisa Hsu and Steven Reinhardt. QoS Policy and Architecture for Cache/Memory in CMP Platforms, Proc. of the ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems (SIGMETRICS), June 2007. (pdf)
      • Seongbeom Kim, Fang Liu, Yan Solihin, Ravi Iyer, Li Zhao and Will Cohen, Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance, Proc. of IEEE International Symposium on Performance Analysis of System and Software (ISPASS), Apr 2007. (pdf)(ppt slides)
      • Yan Solihin, Fei Guo, Seongbeom Kim and Fang Liu. Supporting Qualify of Service in High Performance Servers, IEEE International Parallel & Distributed Processing Symposium (IPDPS) , March 2007. 
      • Guru Venkataramani, Brandyn Roemer, Milos Prvulovic and Yan Solihin,  MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging , Proc. of the 13th International Symposium on High Performance Computer Architecture (HPCA), Feb 2007. (pdf)

      2006
      • Hari Kannan, Fei Guo, Li Zhao, Ramesh illikkal, Ravi Iyer, Don Newell, Yan Solihin and Christos Kozyrakis. From Chaos to QoS: Case Studies in CMP Resource Management. In Workshop on Design, Architecture and Simulation of Chip Multi-Processors, Orlando, Dec 2006.
      • Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru Venkataramani and Milos Prvulovic, Comprehensively and Efficiently Protecting the Heap, Proc. of International Symposium for Programming Languages and Operating Systems (ASPLOS), San Jose, Oct 2006. (pdf) (ppt slides)
      • Brian Rogers, Milos Prvulovic and Yan Solihin, Effective Data Protection for Distributed Shared Memory Multiprocessors, Proc. of International Conference of Parallel Architecture and Compilation Techniques (PACT), Seattle, Sep 2006. (pdf)
      • Chenyu Yan, Brian Rogers, Daniel Englender, Yan Solihin and Milos Prvulovic, Improving Cost, Performance, and Security of Memory Encryption and Authentication, Proc. of International Symposium on Computer Architecture (ISCA), Boston, June 2006. (pdf)
      • Fei Guo and Yan Solihin, An Analytical Model for Cache Replacement Policy Performance, Proc. of ACM SIGMETRICS/Performance 2006 Joint International Conference on Measurement and Modeling of Computer System (SIGMETRICS), Saint-Malo, France, June 2006. (pdf)
      • Changhee Jung, Daeseob Lim, Jaejin Lee, and Yan Solihin, Helper Thread Prefetching for Loosely-Coupled Multiprocessor Systems, Proc. of International Parallel & Distributed Processing Symposium (IPDPS), Isle of Rhodes, Greece, Apr 2006. (pdf)
      • Rithin Shetty, Mazen Kharbutli, Yan Solihin, and Milos Prvulovic, A Helper-Thread Approach to Programmable, Automatic, and Low-Overhead Memory Bug Detection, IBM Journal of Research and Development: Special Issue on Exploratory Systems, to appear in April 2006. (URL)

      2005
      • Fei Guo and Yan Solihin, A Prediction Model for Alternative Cache Replacement Policies, Proc. of IBM Watson Conference on  Interaction between Architecture, Circuits, and Compilers(P=ac2),Yorktown Height, Sep 2005. (pdf)
      • Mazen Kharbutli and Yan Solihin, Counter-Based Cache Replacement AlgorithmsProc. of the International Conference on Computer Design (ICCD),  San Jose, Oct 2005. (pdf)
      • Dhruba Chandra, Fei Guo, Seongbeom Kim, and Yan Solihin, Predicting Inter-Thread Cache Contention on a Chip Multi-Processor ArchitectureProc. of the11th International Symposium on High Performance Computer Architecture (HPCA),  San Francisco, Feb 2005. Nominated for Best Paper Award. (pdf) (ppt slides
      • Yan Solihin, Fei Guo, and Seongbeom Kim, Predicting Cache Contention in Utility Computing Servers, NSF Workshop on Next Generation Software, Boulder, CO, April 2005. (pdf)
      • Mazen Kharbutli, Yan Solihin, and Jaejin Lee, Eliminating Conflict Misses Using Prime Number-Based Cache Indexing, IEEE Transactions on Computers (TC), May 2005. (pdf)
      2004
       
      • Rithin Shetty, Mazen Kharbutli, Yan Solihin, and Milos Prvulovic, HeapMon: a Low Overhead, Automatic, and Programmable Memory Bug Detector, Proc. of IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac2), Yorktown Heights, Oct 2004. (pdf) 
      • Seongbeom Kim, Dhruba Chandra, and Yan Solihin, Fair Caching on a Chip Multiprocessor ArchitectureProc. of IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac2), Yorktown Heights, Oct 2004. (pdf
      • Dhruba Chandra, Fei Guo, Seongbeom Kim, and Yan Solihin, Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture. Proc. of IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac2), Yorktown Heights, Oct 2004. (pdf)
      • Seongbeom Kim, Dhruba Chandra, and Yan Solihin, Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture, Proc. of the13th International Conference on Parallel Architectures and Compilation Techniques (PACT), Juan-les-Pins, France, Sep-Oct 2004. (pdf) (ppt slides)
      • Mazen Kharbutli, Keith Irwin, Yan Solihin, and Jaejin Lee, Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses, Proc. of the 10th Intl. Symposium on High Performance Computer Architecture (HPCA), Feb 2004. (pdf) (ppt slides)
      • Brian Rogers, Yan Solihin, and Milos Prvulovic, Predecryption: Hiding the Latency Overhead of Memory Encryption, Workshop on Architecture Support for Security and Anti-virus Software (WASSA), in conjunction with ASPLOS 2004. Boston, MA, Oct, 2004. (pdf)
       
      2003 and before

      • Yan Solihin, Jaejin Lee, Josep Torrellas, Correlation Prefetching with a User-Level Memory Thread, IEEE Transactions on Parallel and Distributed System (TPDS), June 2003. (pdf)
      • Yan Solihin, Jaejin Lee, Josep Torrellas, Using a User-Level Memory Thread for Correlation Prefetching. Proc. of the 29th International Symposium on Computer Architecture (ISCA), May 2002. ( ps) ( pdf) (ppt slides)
      • Yan Solihin, Jaejin Lee, and Josep Torrellas, Automatic Code Mapping on an Intelligent Memory Architecture. IEEE Transactions on Computers: special issue on Advances in High Performance Memory Systems, Nov 2001. (pdf) (ppt slides)
      • Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, and Maya Gokhale, Mutable Functional Units and Their Applications on Microprocessors. International Conference on Computer Design 2001 (ICCD), Austin, Texas, Sep 23-26, 2001. (pdf) (ppt slides)
      • Jaejin Lee, Yan Solihin, and Josep Torrellas, Automatically Mapping Code in an Intelligent Memory Architecture. 7th International Symposium on High-Performance Computer Architecture (HPCA), Monterrey, Mexico, January 2001.(ps) (pdf)
      • Dominique Lavenier, Kirk W. Cameron, Yan Solihin, Integer/Floating Point Reconfigurable ALU6th Symposium on New Machine Architectures (SympA'6), Besancon, France, Julne 19-22, 2000. (ps)
      • Yan Solihin, Vinh Lam, and Josep Torrellas, Scal-Tool: Pinpointing and Quantifying Scalability Bottlenecks in DSM Multiprocessors, International Conference on High Performance Computing and Communication (SC'99), Portland, Oregon, Nov 1999. (ps)
      • Yan Solihin, Jaejin Lee, Josep Torrellas, Prefetching in an Intelligent Memory Architecture Using a Helper Thread. BEST PAPER AWARD, 5th Workshop on Multi-threaded Execution, Architecture, and Compilation (MTEAC-5), in conjunction with MICRO-34. Austin, Texas, Dec 1-5, 2001. ( pdf)
      • Yan Solihin, Jaejin Lee, and Josep Torrellas, Adaptively Mapping Code in an Intelligent Memory Architecture. 2nd Workshop on Intelligent Memory Systems (WIMS), in conjunction with ASPLOS-IX, Cambridge, Massachusetts, November 2000. (ps) (pdf). Proceedings published as Lecutre Notes in Computer Science, No. 2107, Springer Verlag, September 2001.
      • Yan Solihin, Vinh Lam, and Josep Torrellas, An Inexpensive Tool to Understand the Scalability of Applications on Scalable Shared Memory Machines. 8th Workshop on Scalable Shared Memory Multiprocessors (WSSMM), in conjunction with ISCA, June 1999.


      Tutorials:
      • Modeling the Memory Hierarchy Performance of Current and Future Multicore Architecture, Yan Solihin, Supercomputing 2009, November 2009.
      • Practical Cache Performance Modeling for Computer Architects, Yan Solihin, Fei Guo, Thomas Puzak, and Phil Emma, 13th International Symposium on High Performance Computer Architecture (HPCA), Feb 2007. (Presentation Slides)



      Book:
      • Yan Solihin, Fundamentals of Parallel Computer Architecture, Book Web-Site.
      Book Chapters:
      • Yan Solihin and Donald Yeung, Data Cache Prefetching, Speculative Execution in High-Performance Computer Architectures, Edited by: David Kaeli and Pen-Chung Yew, Chapman & Hall/CRC, ISBN 1-58488-447-9, 2005.
      • Yan Solihin, Jaejin Lee, and Josep Torrellas, Adaptively Mapping Code in an Intelligent Memory Architecture, Lecture Notes in Computer Science, No. 2107, Springer Verlag, September 2001.


      Posters and Technical Reports:
      • Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, and Maya Gokhale, Mutable Functional Units: Initial Results. Poster at IEEE Symposium on FPGAs for Custom Computing Machines (FCCM), Rohnert Park, California, April 30 - May 2, 2001. (ps) (pdf)
      • Yan Solihin, Yong Luo, and Kirk W. Cameron, "Memory Hierarchy Model Validation". Los Alamos National Laboratory unclassified technical report, LA-UR-99-5539, 1999. (ps)
      • Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, and Maya Gokhale, "Reservation Station Architecture of Mutable Functional Unit Usage in Superscalar Processors". Los Alamos National Laboratory unclassified technical report, LA-UR-99-6234, 1999. (ps)
      • Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, and Maya Gokhale, "Boosting the Speedup of Future Processor Architectures by Using Mutable Functional Units". Los Alamos National Laboratory unclassified technical report, LA-UR-99-6768, 1999. (ps)
      • Yan Solihin, "An Application Scalability Model for Distributed Shared Memory Machines", Master's Thesis, University of Illinois at Urbana-Champaign, May 1999.
      • Yan Solihin and Josep Torrellas, "Scalability of Parallel Applications on NCSA's Origin2000 Cluster", Poster at the National Computational Science Alliance, All Hands Meeting (Alliance'98), April 1998.
       

      Image Processing
      Journals:
      • Yan Solihin and C.G. Leedham, Integral Ratio: a New Class of Thresholding Techniques for Handwriting Images, IEEE Transactions on Pattern Analysis and Machine Intelligence (PAMI), August 1999. (pdf)
       
      Conferences:
      • Yan Solihin and C.G. Leedham, Mathematical Properties of the Native Integral Ratio Handwriting and Text Extraction Technique, International Conference on Document Analysis and Recognition (ICDAR), Ulm, Germany, August 1997.(pdf )
      • Yan Solihin and C.G. Leedham, Removing Background and Noise from Handwriting Images, International Conference on Intelligent Information Systems (ICIIS), Grand Bahama Islands, December 1997.
      • Yan Solihin and C.G. Leedham, Preparing Handwriting Images for Forensic Examination, 8th Biennial Conference of International Graphonomics Society (IGS), 1997.
      • Yan Solihin, C.G. Leedham, V.K. Sagar, A Comparison of Thresholding Techniques for Handwriting and Text Extraction, 4th International Conference on Control, Automation, Robotics, and Vision (ICCARV), pp. 1408-1412, Singapore, December 1996.
      • S.W. Chong, C.G. Leedham, V.K. Sagar, Yan Solihin, Automatic Global Feature Extraction for Forensic Document Examination, 4th International Conference on Control, Automation, Robotics, and Vision (ICCARV), Singapore, December 1996.
      • Yan Solihin, C.G. Leedham, V.K. Sagar, A Fuzzy Based Handwriting Extraction Technique for Handwritten Document Preprocessing, IEEE Region Ten Conference: Digital Signal Processing (TENCON), pp. 927-932, Perth, November1996.
      • S.W. Chong, C.G. Leedham, V.K. Sagar, Yan Solihin, Slant Manipulation and Character Segmentation for Forensic Document Examination, IEEE Region Ten Conference: Digital Signal ProcessingTENCON), pp. 933-938, Perth, November 1996.

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