I am a Postdoctoral Researcher under Prof. Chenming Hu at Department of Electrical Engineering and Computer Sciences, University of California, Berkeley. I focus on advanced semiconductor devices (ETSOI MOSFETs, FinFETs, Tunnel FETs, NC-FETs, Monolayer semiconductor devices etc), semiconductor device fabrication, characterization, device-circuit interaction, and analytical and compact modeling. I work with Prof. Hu and Prof. Ali Javey on 2-D semiconductors, III-V semiconductors, and 3-D integration. I work with Prof. Hu and Prof. Sayeef Salahuddin on negative capacitance FETs.
I am a reviewer for Nature Communications, ACS Nano, IEEE Transactions on Electron Devices, IEEE Electron Device Letters, IEE Electron Letters, IEEE VLSI Design Conference, Microelectronics Journal, IEEE ISCAS, IEEE ASSCC, IEEE ISPCC, IEEE IEDM, IEEE VLSI-TSA.
I served on the TPC of IEEE VLSI Design Conference in 2011. I am serving on the TPC
of IEEE VLSI-TSA
conference since 2014.