### LAB MANUAL (DIGITAL ELECTRONICS)

 EXPERIMENT NO:1 Verification and interpretation of truth tables for AND, OR, NOT, NAND, NOR Exclusive OR (EX-OR), Exclusive NOR (EX-NOR) Gates.   Apparatus: Logic trainer kit, logic gates / ICs, wires. Theory:  Logic gates are electronic circuits which perform logical functions on one or more inputs to produce one output. There are seven logic gates. When all the input combinations of a logic gate are written in a series and their corrresponding outputs written along them, then this input/ output combination is called Truth Table. Various gates and their working is explained here.   AND Gate AND gate produces an output as 1, when all its inputs are 1; otherwise the output is 0. This gate can have minimum 2 inputs but output is always one. Its output is 0 when any input is 0. IC 7408 ---------------------------------------------------------------------------------------------------   OR Gate OR gate produces an output as 1, when any or all its inputs are 1; otherwise the output is 0. This gate can have minimum 2 inputs but output is always one. Its output is 0 when all input are 0. IC 7432 --------------------------------------------------------------------------------------------------- NOT Gate NOT gate produces the complement of its input. This gate is also called an INVERTER. It always has one input and one output. Its output is 0 when input is 1 and output is 1 when input is 0. IC 7404 --------------------------------------------------------------------------------------------------- NAND Gate NAND gate is actually a series of AND gate with NOT gate. If we connect the output of an AND gate to the input of a NOT gate, this combination will work as NOT-AND or NAND gate. Its output is 1 when any or all inputs are 0, otherwise output is 1.   IC 7400 ---------------------------------------------------------------------------------------------------  NOR Gate NOR gate is actually a series of OR gate with NOT gate. If we connect the output of an OR gate to the input of  a NOT gate, this combination will work as NOT-OR or NOR gate. Its output is 0 when any or all inputs are 1, otherwise output is 1. IC 7402 --------------------------------------------------------------------------------------------------- Exclusive OR (X-OR) Gate X-OR gate produces an output as 1, when number of 1’s at its inputs is odd, otherwise output is 0. It has two inputs and one output.   IC 7486 --------------------------------------------------------------------------------------------------- Exclusive NOR (X-NOR) Gate X-NOR gate produces an output as 1, when number of 1’s at its inputs is not odd, otherwise output is 0. It has two inputs and one output. --------------------------------------------------------------------------------------------------- Procedure: Connect the trainer kit to ac power supply. Connect the inputs of any one logic gate to the logic sources and its output to the logic indicator. Apply varous input combinations and observe output for each one. Verify the truth table for each input/ output combination. Repeat the process for all other logic gates. Switch off the ac power supply.     GO TO TOP Realization of logic functions with the help of universal gates-NAND Gate. Apparatus: logic trainer kit, NAND gates (IC 7400), wires. Theory: NAND gate is actually a combination of two logic gates: AND gate followed by NOT gate. So its output is complement of the output of an AND gate.   This gate can have minimum two inputs, output is always one. By using only NAND gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NOR. So this gate is also called universal gate.   NAND gates as NOT gate A NOT produces complement of the input. It can have only one input, tie the inputs of a NAND gate together. Now it will work as a NOT gate. Its output is Y = (A.A)’ =>                                            Y = (A)’ ---------------------------------------------------------------------------------------------------  NAND gates as AND gate A NAND produces complement of AND gate. So, if the output of a NAND gate is inverted, overall output will be that of an AND gate.                                                 Y = ((A.B)’)’ =>                                            Y = (A.B) --------------------------------------------------------------------------------------------------- NAND gates as OR gate From DeMorgan’s theorems: (A.B)’ = A’ + B’ =>                                            (A’.B’)’ = A’’ + B’’ = A + B So, give the inverted inputs to a NAND gate, obtain OR operation at output. ---------------------------------------------------------------------------------------------------  NAND gates as X-OR gate The output of a to input X-OR gate is shown by: Y = A’B + AB’. This can be achieved with the logic diagram shown in the left side. Gate No.          Inputs                                       Output 1                      A, B                                         (AB)’ 2                      A, (AB)’                                  (A (AB)’)’ 3                      (AB)’, B                                   (B (AB)’)’ 4                      (A (AB)’)’, (B (AB)’)’ A’B + AB’ Now the ouput from gate no. 4 is the overall output of the configuration. Y         =          ((A (AB)’)’ (B (AB)’)’)’             =          (A(AB)’)’’ + (B(AB)’)’’             =          (A(AB)’) + (B(AB)’)             =          (A(A’ + B)’) + (B(A’ + B’)) =          (AA’ + AB’) + (BA’ + BB’) =          ( 0 + AB’ + BA’ + 0 ) =          AB’ + BA’ =>                                            Y         =          AB’ + A’B --------------------------------------------------------------------------------------------------- NAND gates as X-NOR gate X-NOR gate is actually X-OR gate followed by NOT gate. So give the output of X-OR gate to a NOT gate, overall ouput is  that of an X-NOR gate.                                                 Y = AB+ A’B’ --------------------------------------------------------------------------------------------------- NAND gates as NOR gate A NOR gate is an OR gate followed by NOT gate. So connect the output of OR gate to a NOT gate, overall output is that of a NOR gate.                                                 Y = (A + B)’ --------------------------------------------------------------------------------------------------- Procedure: Connect the trainer kit to ac power supply. Connect the NAND gates for any of the logic functions to be realised. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator. Apply varous input combinations and observe output for each one. Verify the tructh table for each input/ output combination. Repeat the process for all logic functions. Switch off the ac power supply.     GO TO TOP   Realization of logic functions with the help of universal gates-NOR Gate. Apparatus: logic trainer kit, NOR gates (IC 7402), wires. Theory: NOR gate is actually a combination of two logic gates: OR gate followed by NOT gate. So its output is complement of the output of an OR gate.   This gate can have minimum two inputs, output is always one. By using only NOR gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NAND. So this gate is also called universal gate. ---------------------------------------------------------------------------------------------------  NOR gates as NOT gate A NOT produces complement of the input. It can have only one input, tie the inputs of a NOR gate together. Now it will work as a NOT gate. Its output is Y = (A+A)’ =>                                            Y = (A)’ ---------------------------------------------------------------------------------------------------  NOR gates as OR gate A NOR produces complement of OR gate. So, if the output of a NOR gate is inverted, overall output will be that of an OR gate.                                                 Y = ((A+B)’)’ =>                                            Y = (A+B) ---------------------------------------------------------------------------------------------------                                    NOR gates as AND gate From DeMorgan’s theorems: (A+B)’ = A’B’ =>                                            (A’+B’)’ = A’’B’’ = AB So, give the inverted inputs to a NOR gate, obtain AND operation at output. ---------------------------------------------------------------------------------------------------     NOR gates as X-NOR gate The output of a two input X-NOR gate is shown by: Y = AB + A’B’. This can be achieved with the logic diagram shown in the left side.   Gate No.          Inputs                                                   Output 1                      A, B                                                     (A + B)’ 2                      A, (A + B)’                                          (A + (A+B)’)’ 3                      (A + B)’, B                                          (B + (A+B)’)’ 4                      (A + (A + B)’)’, (B + (A+B)’)’            AB + A’B’ Now the ouput from gate no. 4is the overall output of the configuration. Y         =          ((A + (A+B)’)’ (B +( A+B)’)’)’             =          (A+(A+B)’)’’.(B+(A+B)’)’’             =          (A+(A+B)’).(B+(A+B)’)             =          (A+A’B’).(B+A’B’) =          (A + A’).(A + B’).(B+A’)(B+B’) =          1.(A+B’).(B+A’).1 =          (A+B’).(B+A’)                                                             =          A.(B + A’) +B’.(B+A’)                                                             =          AB + AA’ +B’B+B’A’                                                             =          AB + 0 + 0 + B’A’                                                             =          AB + B’A’ =>                                            Y         =          AB + A’B’ ---------------------------------------------------------------------------------------------------  NOR gates as X-OR gate X-OR gate is actually X-NOR gate followed by NOT gate. So give the output of X-NOR gate to a NOT gate, overall ouput is that of an X-OR gate.                                                 Y = A’B+ AB’                                                 --------------------------------------------------------------------------------------------------- NOR gates as NAND gate A NAND gate is an AND gate followed by NOT gate. So connect the output of AND gate to a NOT gate, overall output is that of a NAND gate.                                                 Y = (AB)’ --------------------------------------------------------------------------------------------------- Procedure: Connect the trainer kit to ac power supply. Connect the NOR gates for any of the logic functions to be realised. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator. Apply varous input combinations and observe output for each one. Verify the tructh table for each input/ output combination. Repeat the process for all logic functions. Switch off the ac power supply.     Expleriment No:4 GO TO TOP Construction of half adder using XOR and NAND gates and verification of its operation.   Apparatus: Logic trainer kit, Logic gates: AND (IC 7408), XOR (IC 7486), NAND(7400).   Theory: A half adder can add two bits at a time. Its outputs are SUM and CARRY. For two bit addition- SUM will be 1, if only one input is 1(X-OR operation). CARRY will be one, when both inputs are 1 (AND operation). So, by using one AND gate and one X-OR gate, a half adder circuit can be constructed. Boolean expressions for the outputs are:                                     SUM = AB’ + A’B                                          CARRY = AB Procedure: Connect the trainer kit to ac power supply. Connect logic sources to the inputs of the adder. connect output from SUM and CARRY to logic indicators. Apply various input combinations to the adder. Observe the SUM and CARRY outputs, verify the tructh table for each input/ output combination. Switch off the ac power supply.   Experiment No: 5 GO TO TOP Construction of a NOR gate latch and verification of its operation.   Apparatus: Logic trainer kit, NOR gates (IC 7402), wires. Theory: An S-R (Set, Reset) latch is a digital storage device.  It can store one bit at time. Its output depends upon the combination of inputs and previously stored bit.   An S-R latch can be constructed by using two cross couples NAND/ NOR gates. We will use NOR gates and construct an active high S-R latch. ---------------------------------------------------------------------------------------------------                                    ---------------------------------------------------------------------------------------------------                                    Operation of S-R latch   S=0, R=0: this is the rest state of the NOR latch. This input has no effect on the output state. Outputs (Q, Q’) will remain in whatever state they were prior to the occurance of this input combination. S=1, R=0: this will always set the latch (Q=1, Q’=0), it will remain in this state even after S returns to 0. S=0, R=1: this will always reset the latch (Q=0, Q’=1), it will remain in this state even after r returns to 0. S=1, R=1: this condition tries to set and reset the latch at the same time and produces Q=0, Q’=0.  If inputs are returned to 0 at same time, the resulting output state is unpredictable. This input condition should not be used. Procedure: Connect the trainer kit to ac power supply. Construct an R-S latch by connecting two NOR gates as per logic diagram. Connect logic sources to R, S inputs and outputs Q, Q’ to logic indicators. Apply various R-S combinations and observe Q,Q’  outputs. Verify the truth table.  Switch off the ac power supply.