Design and Testing of Reversible Circuits

Introduction:

The major problem that the designers are currently working on is power consumption and the propagation delay of the digital circuits. The used technologies like the CMOS have reached their limitation of not shrinking down further after 7nm. The conventional irreversible circuits used today also have to suffer through the heat generation produced by the erasure of previous input logical data, and such each erasure dissipate energy equals to KTln2. The solution to this is the use of reversible logic gates that provide one to one mapping between input and output, physical reversibility and prevention of heat dissipation due to the loss of data. Reversible logic synthesis is also a solution to the area efficiency and low power digital logic circuit design for blooming technologies like the Internet of Things (IoT) and quantum computing applications. The Quantum Cellular Automata (QCA) is the one that supports the reversibility beautifully in terms of space complexity also. It uses the qubit, in general, saying polarization of electrons to represent the logic state instead of the conventional voltage references. QCA can build basic logic gates like AND, OR, NOT, NAND, NOR, XOR, XNOR, to the required reversible gates like Feynman gate, Toffoli gate, Fredkin gate, Peres gate at nano scale circuit design level. With the help of this reversible gates made up with QCA, various reversible circuits can be made like the one-bit reversible comparator. During the making of these reversible circuits, various combinations can come up, each having a different combination of gates. Therefore, the one which has the least quantum cost, garbage output, requiring less area and power must be taken into the consideration.

The CAD tool used for the designing purpose of the one-bit reversible comparator is the QCA Designer. It was initially developed at the ATIPS laboratory University of Calgary, Calgary, Canada. The advantage of using it is the accurate simulation result to determine the functionality of QCA circuits. This tool has already been used to create verified layout like full-adders and barrel shifters like circuits [9].

Reversible Gates:

As discussed earlier to design any reversible circuit we require reversible gates. So various reversible gates available in market are designed in QCA designer tool and the obtained simulated result are compared with the prepared truth table to check whether the obtained result are as per our expectation. The first figure in all the gates described below represents the functionality or the Boolean expression of that gate. The second figure in all the gates represents the design that is implemented in QCA tool. Third comes the truth table and the cycles above each output in truth table denotes the delay after which that result will be obtained. So, for example in Table 1, the ‘1 cycle’ written above the output AB represents that the output AB will be available after 1 cycle delay. The last figure in all the gates represents the simulated output for that gate.

1. Toffoli Gate