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Sudheer Kumar Vishwakarma
Sudheer Kumar Vishwakarma
Research Associate
SPECIAL MANPOWER DEVELOPMENT PROGRAMME CHIP TO SYSTEM DESIGN (SMDPC2SD)
Indian Institute of Technology Indore
Research Interest
Research Interest
DIGITAL VLSI DESIGN
CMOS
FLIP FLOPS
SRAM
DEEP NEURAL NETWORK
CNN
ACTIVATION FUNCTION
MAC UNIT
Research Paper
Harsh Chhajed; Gopal Raut; Narendra Singh Dhakad; Sudheer Vishwakarma; Santosh Kumar Vishvakarma "BitMAC: Bit-Serial Computation based Efficient Multiply-Accumulate Unit for DNN Accelerator" Circuits, Systems & Signal Processing (Accepted).
Technical Strength
Analog Designing (Cadence-Virtuoso)
RTL Synthesis (Synopsys-Design Vision/ Cadence-RC, Vivado)
Hardware Description Language (Verilog, VHDL)
Physical designing (Cadence Encounter)
Formal Verification (Synopsys-Verification)
Mixed-signal VLSI designing (virtuoso-Cadence)
Hardware Implementation of (Xilinx)
Post Layout Verification and Parasitic Extraction (Calibre-Mentor Graphics)
Software Proficiency
Intermediate Knowledge: Linux, Windows, Ubuntu, Latex
Basic Knowledge: Tickle-TCL/tk, Perl, Bash, Verilog-VHDL
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