Digital Logic

Introduction

Using either simulatior.io or logic.ly perform the following tasks. Upon completion, take screenshots of your circuit demonstrating its abilities.

Package all images into a single zip file named YourName_DigitalLogic.zip.

Part 1 - Decoder

In class we created a 2-to-4 binary decoder. You will be creating a 3-to-8 binary decoder with an enable bit.

This decoder should take 3 binary inputs, produce 8 binary outputs. Each output should only occur for one combination of inputs. That's what makes it a decoder.

The enable bit, when in the off position, will completely disable ALL outputs.

Part 2 - Half Adder/Full Adder

Research what a half-adder and full-adder circuit are, then implement them both.

Be sure to use the Half-Adder to create the Full-Adder.

Part 3 - 7 Segment Display Decoder

Read the article located here. The article discusses how 7-segment displays work, including the Boolean logic surrounding which segments are lit up at any given time. Your task is to create the logic circuit that will power a 7-segment display.

Projects that create a display capable of producing the numbers 0 to 9 will be eligible for a mark up to 80%.

Producing a display capable of displaying all hexadecimal digits (0 to F) will be eligible for a mark up to 95%.

Producing a display of 2 digits, capable of displaying any number of values 16 or greater will receive 100%

Here is a simulator.io file with the segments and busses created.

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