U.S.-Japan Collaborative Workshop:
 Accelerating IC Design [Phase II]


May 14(Tue) - 15(Wed), 2024  

Hybrid: Momochi, Fukuoka, Japan + ZOOM Webinars


[Japanese]

The semiconductor industry faces many challenges related to supply chain shortages and overreliance on a small number of chip fabrication facilities. To enhance global economic security and prosperity, the American and Japanese governments are collaborating on a workforce training program specifically focusing on the semiconductor industry. The first phase of this project, an activity to our commitment, was held as a 2-day online workshop on December 5-6, 2023. It featured distinguished invited talks of experts in integrated circuit design from academia and industry, ensuring a high level of discourse and knowledge exchange. The Phase-2 in-person workshop, May 14-15, 2024, is the next step of this project. You can also join remotely via ZOOM webinars. The scope includes open-source IC designs, advanced analog/digital IC designs, LLM acceleration, photonics designs, cryogenic classical-quantum computing, and emerging device technologies. We are planning to take hands-on training, so please bring/prepare your laptop PC. The ultimate goal is exploring, bridging, and accelerating U.S.-Japan collaborations regarding cutting-edge IC designs.

[Registration (Deadline: May 13th, 2024)]

Please register from the link below (you can also register only for Day-1 or Day-2). Simultaneous English-to-Japanese interpretation will be available at the Fukuoka venue and at the Zoom webinars. Please note that registration at the Fukuoka venue will be limited to the first 70 registrants, and registration for the ZOOM webinars will be limited to the first 400 registrants. If you wish to cancel your Fukuoka in-person registration, please get in touch with us as soon as possible.

[Registration Fee] 

Free

[Venue (in-person)] 

Fukuoka Institute of System LSI Design Industry (3-8-33, Momochihama, Sawara-ku, Fukuoka-shi, Fukuoka, 814-0001 , Japan)

[Program (to be updated)]


===== Day-1: May 14th, 10:00-16:00 (JST) =====

10:00 - 10:05  Opening Remark and Overview of the Workshop, Mehdi Saligane/Koji Inoue, University of Michigan/Kyushu University

[Morning Session: Invited Talks]

10:05 - 10:10  Welcome Remarks from the U.S. Consulate in Fukuoka

10:10 - 10:55  LLMs on ASICs, Greg Kielian/Kauna Lei, Google Research

11:00 - 11:45  Teaching Mixed-Signal Design Using Open-Source Tools, Boris Murmann, University of Hawaii

11:45 - 13:00 Lunch Break

[Afternoon Session: Tutorials]

13:00 - 14:00  Photonic and Analog circuits with GDSFactory, Joaquin Matres/Troy Tamas, Google X/DoPlayDo, Inc.

14:00 - 14:15 Break

14:15 - 15:45 ReaLLMASIC: Build your own Lightweight LLM, Gregory Kielian/Kauna Lei/Shiwei Liu/Mehdi Saligane, Google Research/University of Michigan

15:45 - 16:00  Conclusion, Mehdi Saligane, University of Michigan


====== Day-2: May 15th, 10:00-16:05 (JST) ======

10:00 - 10:05  Opening Remark and Overview of Day-2 Workshop, Mehdi Saligane/Koji Inoue, University of Michigan/Kyushu University

[Morning Session: Invited Talks]

10:05 - 10:50  Superconductor Computer Architecture: from Classical to Quantum, Ilkwon Byun, Kyushu University 

10:50 - 11:35  Overview of new devices in the era of Beyond CMOS, Sadayuki Yoshitomi, Megachips

11:35 - 13:00 Lunch Break

[Afternoon Session: Tutorials]

13:00 - 13:55  (Tentative: GLayout), Anhang Li/Boris Murmann/Mehdi Saligane, University of Michigan/University of Hawaii

13:55 - 14:50  (Tentative: XLS: High-Level Synthesis), Johan Euphrosine, Google

14:50 - 15:05 Break

15:05 - 16:00 Pitfalls of Open-Source Chip Design Verification, Mitch Bailey, Efabless/ShuhariSystem

16:00 - 16:05 Conclusion and Overview of the phase-2 workshop activities, Mehdi Saligane/Koji Inoue, University of Michigan/Kyushu University

[Contact]

ic-design-ws 'at' slrc.kyushu-u.ac.jp

mehdi 'at' umich.edu

[Main Sponsor]

[Technical Sponsors]

[Technical Support]