1. Educations

M.S. School of Semiconductor Engineering, Chungbuk National University, Cheongju, Republic of Korea. 

Sep. 2024 - Present

B.S. School of Electric Engineering, Chungbuk National University, Cheongju, Republic of Korea.  

Mar. 2018 - Feb. 2024

2. Research Interests & Research Projects

• Research Interests

[3] System Device Simulation (FinFET, Nanosheet FET)

[2] Power Device Simulation (SiC MOSFET)

[1] Fabrication of Semiconductor Devices

•  Research Projects

[1] 고압 중수소 열처리를 통한 실리콘 MOSFET 소자의 Gate Dielectric 신뢰성 개선 (2022.05.01 - 2025.04.30), 삼성전자

3. Journal Papers

• International Journal Papers (SCIE)

[7] D.-E. Bang, M.-K. Lee, E.-C. Yun, T.-H. Kil, H.-J. Park, J.-W. Yeon, M.-W. Kim, S.-J. Jeon, A-Y. Kim, and J.-Y. Park*, "Junction Depth Optimization in Trench Gate Nanosheet FETs for Reduced Off-State Current", Silicon, vol. xx, no. x,  pp. xxxx-xxxx, in press.

[6] S.-J. Jeon, H.-J. Park, S.-J. Chang, M.-K. Lee, E.-C. Yun, T.-H. Kil, J.-W. Yeon, M.-W. Kim, and J.-Y. Park*, "First Demonstration of Rapid Deuterium Annealing for Interface Trap Reduction in HKMG MOSFETs", Semicond. Sci. Technol. vol. xx, no. x,  pp. xxxx-xxxx, in press.

[5] M.-K. Lee, H.-J. Park, T.-H. Kil, J.-W. Yeon, E.-C. Yun, M.-W. Kim, and J.-Y. Park*, "W-Shaped Silicon Channels to Increase the Channel Perimeter and Improve the Output Current of Multi-Bridge-Channel FETs", Silicon, vol.17, pp. 817–823, Feb. 2025. [ LINK ] 

[4] H. Song, S. J. Yoon, J. Yoo, S. Lim, J.-Y. Ku, T.-H. Kil, H. Lee, J. Jeong, S. Kim, M.-K. Lee, H.-S. Jang, K. Lee, K. Heo, J.-Y. Park, Y. K. Lee*, and H. Bae*, "Quantitative Analysis of Trap Behaviors for Deuterium Annealing Effect on IGZO TFTs by TCAD and Experimental Characterization", IEEE Trans. Electron Devices, vol. 72, no. 3,  pp. 1180-1183, Mar. 2025. [ LINK ] 

[3] J.-W. Yeon, H.-J. Park, E.-C. Yun, M.-K. Lee, T.-H. Kil, Y.-S. Kim*, and J.-Y. Park*, "Improvement of Surface Roughness in SiO2 Thin Films via Deuterium Annealing at 300 °C", IEEE Trans. Nanotechnol., vol. 24, pp. 54–58, Jan. 2025.  [ LINK ] 

[2] T.-H. Kil, H.-J. Park, J.-W. Yeon, M.-K. Lee, E.-C. Yun, and J.-Y. Park*, "Durability of Low-Temperature Deuterium Annealing Against Ionizing Radiation in MOSFETs," IEEE Trans. Electron Devices, vol. 71, no. 9,  pp. 5177–5181, Sep. 2024. [ LINK ]  

[1] T.-H. Kil, J.-W. Yeon, H.-J. Park, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-M. Kang, and J.-Y. Park*, "Low-Temperature Deuterium Annealing for HfO2 /SiO2 Gate Dielectric in Silicon MOSFETs", IEEE J. Electron Devices Soc., in press. [ LINK ]  

• Domestic Journal Papers (KCI)

[4] A-Y. Kim, D.-E. Bang, H.-J. Park, T.-H. Kil, J.-W. Yeon, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, M.-S. Kim, and J.-Y. Park*, "Study on Hetero Gate Dielectrics to Reduce Ambipolar Current in Nanosheet Tunneling FETs", Trans. Electr. Electron. Mater., in press.

[3] S.-M. Kang, Y.-J. Choi, H.-J. Park, T.-H. Kil, J.-W. Yeon, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, M.-S. Kim*, and J.-Y. Park*, "Study on Multiple Post-Metallization Annealing for Enhancing the Performance and Reliability of Silicon MOSFETs", Trans. Electr. Electron. Mater., vol. 38, no. 2, pp. 187–192, Mar. 2025. [ LINK ]

[2] H.-S. Jee, D. Sohn, J.-W. Yeon, T.-H. Kil, H.-J. Park, E.-C. Yun, M.-K. Lee, and J.-Y. Park*, "Fabrication of Low-Cost Physically Unclonable Function (PUF) Chip using Multiple Process Variables", Trans. Electr. Electron. Mater., vol. 37, no. 5, pp. 527–532, Sep. 2024. [ LINK ]

[1] H.-J. Park, T.-H. Kil, J.-W. Yeon, M.-K. Lee, E.-C. Yun, and J.-Y. Park*, "Recovery of Radiation-Induced Damage in MOSFETs using Low-Temperature Heat Treatment", Trans. Electr. Electron. Mater., vol. 37, no. 5, pp. 507–511, Sep. 2024. [ LINK ]

4. Patents & Conferences

• Patents

[3] 박준영, 손돌, 김민우, 연주원, 박효준, 이문권, 윤의철", 브이-노치 메탈 접촉 구조를 갖는 나노시트 반도체소자 및 그의 제조방법", KR 10-2025-0080331, 2025.06.18. 

[2] 박준영, 이문권, 연주원, 박효준, 길태현, 윤의철, 김민우, 전수진, "임베디드 게이트 구조를 갖는 나노시트 반도체 소자", KR 10-2024-0196503, 2024.12.26. [ LINK ] 

[1] 박준영, 이문권, 길태현, 박효준, 윤의철, 연주원, 지홍석, "커브드 채널을 갖는 나노시트 반도체소자 제조방법 및 이에 의하여 제조된 나노시트 반도체소자", KR 10-2024-0096067, 2024.07.22. [ LINK ] 

• Conferences

[2] M.-K. Lee, H.-J. Park, E.-C. Yun, J.-W. Yeon, T.-H. Kil, M.-W. Kim, S.-J. Jeon, D.-E. Bang, D. Sohn, A-Y. Kim, S.-M. Kang, and J.-Y. Park*, "Partial Trench Gate Nanosheet FETs for Enhanced ION/ IOFF Ratio", The 32nd Korean Conference on Semiconductors, Feb. 2025. [ LINK ]

[1] H.-S. Jee, D. Sohn, J.-W. Yeon, H.-J. Park, T.-H. Kil, E.-C. Yun, M.-K. Lee, S.-M. Kang, A-Y. Kim, Y.-J. Choi, D.-E. Bang, and  J.-Y. Park*, "Development of Physically Unclonable Function (PUF) using Multiple Process Variables", KIEEME Annual Summer Conference 2024, Jun. 2024. [ LINK ]  "Award" [ LINK ]

5. Award & Experiences

• Award (Domestic)

[1] 한국전기전자재료학회 장려상 (2024.06)

• Experiences

[2] Teaching Assistant for '반도체소자공정실험', Fall, 2024

[1] Teaching Assistant for '반도체소자공정실험', Spring, 2024