Welcome

Wenfeng Zhao received his Ph.D. degree from the National University of Singapore in 2014, Master's and Bachelor's degrees from Huazhong University of Science and Technology in 2009 and 2007, respectively. He was a postdoctoral research fellow in the Department of Electrical and Computer Engineering at the National University of Singapore from 2014 to 2016, and a postdoctoral researcher in the Department of Biomedical Engineering at the University of Minnesota, Twin Cities from 2016 to 2019. Dr. Zhao joined the Department of Electrical and Computer Engineering at Binghamton University in 2020. He was a recipient of Mistletoe Research Fellowship in 2019. He is an integrated circuit designer by training, and his current research interests lie in the application of integrated circuits and micro-systems to neural engineering, hardware security, and compute efficiency.

We are looking for motivated students to join our research group. We do not have Ph.D. openings at the moment. For current Master and Undergraduate Students interested in our research, please contact me with your interests and CV. 

2025

• Y. Zhang, O. Al Kailani, B. Zhou, and W. Zhao, "AdderNet 2.0: optimal fpga acceleration of addernet wit activation-oriented quantization and fused bias removal based memory optimization," IEEE Transactions on Circuits and Systems I : Regular Papers, in press, 2025.

• A. Dervay, and W. Zhao, "BCIM: constant-time and high-throughput block-cipher-in-memory with massively-parallel bit-serial execution," IEEE Transactions on Emerging Topics in Computing, in press, 2025.

• G. Sun, Z. Liu, L. Gan, H. Su, T. Li, W. Zhao, and Biao Sun, "Spikenas-bench: benchmarking nas algorithms for spiking neural network architecture," IEEE Transactions on Artificial Intelligence, in press, 2025.

• L. Cao, W. Zhao, and B. Sun, "Emotion recognition using multi-scale EEG features through graph convolutional attention network," Neural Networks, vol. 184, 2025, 107060.

2024

• J. Xie, W. Zhao, H. Lee, D. Roy, and X. Zhang, "Hardware circuits and systems design for post-quantum cryptography – a tutorial brief," IEEE Transactions on Circuits and Systems II : Express Briefs, vol. 71, no. 3, pp. 1670-1676, March 2024.

• J. Xu, A. T. Nguyen, W. Zhao, W. Chen and Z. Yang, "An mri compatible data acquisition device for rat brain recording inside 16.4t magnet," in IEEE Transactions on Biomedical Circuits and Systems, vol. 18, no. 1, pp. 160-173, Feb. 2024,

• J. Zhai, W. Zhao, Biao Sun, ”Compression of respiratory sound signals via TranscoderQVAE”, in IEEE Biomedical Circuits and Systems Conference (BioCAS), 2024, pp. 1-5.

• Y. Zhang, O. Al Kailani, and W. Zhao, "AdderNet 2.0: optimal fpga acceleration of addernet wit activation-oriented quantization and fused bias removal based memory optimization," in 2024 IEEE/ACM Design Automation Conference (DAC), 2024, pp. 1-6. 

2023

• T. He, Y. Zheng, X. Liang, J. Li, L. Lin, W. Zhao, Y. Li, and J. Zhao, "A highly energy-efficient body coupled transceiver employing a power-on-demand amplifier," AAAS Cyborg and Bionic Systems, vol. 4, pp. 0030, 2023.

• H. Zhang, Y. Shu, Q. Deng, H. Sun, W. Zhao, and Y. Ha, "WDVR-RAM : A 0.25–1.2 V, 2.6–76 POPS/W Charge-Domain In-Memory-Computing Binarized CNN Accelerator for Dynamic AIoT Workloads," IEEE Transactions on Circuits and Systems I : Regular Papers, vol. 70, no. 10, pp. 3964-3977, Oct 2023.

• Y. Wang, S. Zhang, Y. Li, J. Chen, W. Zhao, and Y. Ha, "A reliable and high-speed 6t compute-sram design with dual-split-vdd assist and bitline leakage compensation," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 5, pp. 684-695, May 2023.

2022

• A. Dervay, and W. Zhao, "CIMulator: a computing in memory emulator framework," IEEE Transactions on Circuits and Systems II : Express Briefs, vol. 69, no. 10, pp. 4183–4187, 2022.

• D.K. Luu, A.T. Nguyen, M. Jiang, M.W. Drealan, J. Xu, T. Wu, W. Tam, W. Zhao, B. Lim, C.K. Overstreet, Q. Zhao, J. Cheng, E. Keefer, Z. Yang, “Artificial Intelligence Enables Real-Time and Intuitive Control of Prostheses via Nerve Interface,” IEEE Transactions on Biomedical Engineering, vol. 69, no. 10, pp. 3051–3063, 2022.

• J. Chen, W. Zhao, Y. Wang, Y. Shu, W. Jiang, and Y. Ha, ”A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 6, pp. 769-780, June 2022.

• C. Tang, L. Alahmed, J. Xu, M. Shen, N. A. Jones, M. Sadi, U. Guin, W. Zhao, and P. Li, “Effects of temperature and structural geometries on a skyrmion logic gate,” IEEE Transactions on Electron Devices,  vol. 69, no. 4, pp. 1706–1712, 2022.

• Y. Zhang, B. Sun, W. Jiang, Y. Ha, M. Hu, and W. Zhao, "WSQ-AdderNet: efficient weight standardization based quantized addernet FPGA accelerator design with high-density INT8 DSP-LUT co-packing optimization," in 2022 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022, pp. 1-9.

• Y. Zhang, J. Xu, M. Hu, and W. Zhao, “Exploiting a blink of measurement saturation towards hardware-efficient compressed sensing encoder design," in Circuits and Systems (ISCAS), 2022 IEEE International Symposium on, 2022, pp. 4183 - 4187.

2021

• J. Chen, W. Zhao, Y. Wang, and Y. Ha, “Analysis and design of reconfigurable sense amplifier for compute sram with high-speed and normal read access,” IEEE Transactions on Circuits and Systems II : Express Briefs, vol. 68, no. 12, pp. 3503–3507, 2021.

• B. Sun, and W. Zhao, "Compressed Sensing of Extracellular Neurophysiology Signals: A Review," Frontiers in Neuroscience, p.948, 2021.

• L. Liu, M. Mohammadifar, A. Elhadad, M. Tahernia, Y. Zhang, W. Zhao, and S. Choi, “Spatial engineering of microbial consortium for long-lasting, self-sustaining, and high-power generation in a bacteria-powered biobattery,” Advanced Energy Materials, p. 2100713, 2021.

• H. Zhang, Y. Shu, W. Jiang, Z. Yin, W. Zhao, and Y. Ha, “A 55nm, 0.4v 5526-tops/w compute-in-memory binarized cnn accelerator for aiot applications,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 5, pp. 1695–1699, 2021.

• J. Chen, W. Zhao, Y. Wang, and Y. Ha, “Analysis and optimization strategies toward reliable and high-speed 6t compute sram,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 4, pp. 1520–1531, 2021.

2020

• A. T. Nguyen, J. Xu, M. Jiang, D. K. Luu, T. Wu, W. K. Tam, W. Zhao et al., “A bioelectric neural interface towards intuitive prosthetic control for amputees,” Journal of Neural Engineering, vol. 17, no. 6, p. 066001, 2020.

• J. Xu, A. T. Nguyen, T. Wu, W. Zhao, D. K. Luu, and Z. Yang, “A wide dynamic range neural data acquisition system with high-precision delta-sigma adc and on-chip ec-pc spike processor,” IEEE Transactions on Biomedical Circuits and Systems, vol. 14, no. 3, pp. 425–440, 2020.

Before 2020

• J. Chen, W. Zhao, and Y. Ha, “Area-efficient distributed arithmetic optimization via heuristic decomposition and in-memory computing,” 2019 IEEE 13th International Conference on ASIC (ASICON). IEEE, 2019, pp. 1–4.

• W. Zhao, T. Wu, J. Xu, Q. Zhao, and Z. Yang, “Block-sparse modeling for compressed sensing of neural action potentials and local field potentials,” 2019 53rd Asilomar Conference on Signals, Systems, and Computers (Asilomar). IEEE, 2019, pp. 2097–2100.

• W. Zhao, B. Sun, J. Chen, and Y. Ha, “Axc-cs: Approximate computing for hardware efficient compressed sensing encoder design,” 2019 32nd IEEE International System-on-Chip Conference (SOCC). IEEE, 2019, pp. 479–483.

• T. Wu, W. Zhao, E. Keefer, and Z. Yang, “Deep compressive autoencoder for action potential compression in large-scale neural recording,” Journal of Neural Engineering, vol. 15, no. 6, p. 066019, 2018.

• J. Xu, AT Nguyen, W. Zhao, H. Guo, T. Wu, H. Lim, and Z Yang, "A low-noise, wireless, frequency-shaping based neural recorder," IEEE Journal on Emerging Trends in Circuits and Systems, vol. 8, no. 2, pp. 187–200, 2018.

• W. Zhao, B. Sun, T. Wu, and Z. Yang, "On-chip neural data compression based on compressed sensing with sparse sensing matrices," IEEE Transactions on Biomedical Circuits and Systems, vol. 12, no. 1, pp. 242–254, 2018.

• T. Wu, W. Zhao, E. Keefer, and Z. Yang, “A lightweight deep compressive model for large-scale spike compression,” 2018 IEEE Biomedical Circuits and Systems Conference (BioCAS). IEEE, 2018, pp. 1–4.

• T. Wu, W. Zhao, H. Guo, H. Lim, and Z. Yang, "A streaming pca vlsi chip for neural data compression," IEEE Transactions on Biomedical Circuits and Systems, vol. 11, no. 6, pp. 1290–1302, 2017.

• B. Sun, W. Zhao, and X. Zhu, "Training-free compressed sensing for wireless neural recording using analysis model and group weighted-minimization," Journal of Neural Engineering, vol. 14, no. 3, p. 036018, 2017.

• W. Zhao, A. Li, Y. Wang, and Y. Ha, "Analysis and design of energy-efficient data-dependent sram," invited, ASIC (ASICON), 2017 IEEE 12th International Conference on. IEEE, 912-915, 2017. 

• A. Li, W. Zhao and S. L. Song, "BVF: enabling significant on-chip power savings via bit-value-favor for throughput processors," Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2017, pp. 532–545.

• AB. Alvarez, W. Zhao, and M. Alioto, "Static physically unclonable functions for secure chip identification with 1.9 - 5.8% native bit instability at 0.6-1 V and 15 fJ/bit in 65 nm," IEEE Journal of Solid-State Circuits, 51 (3), 763-775, 2016.

• W. Zhao, B. Sun, T. Wu, and Z. Yang, "Hardware efficient, deterministic qcac matrix based compressed sensing encoder architecture for wireless neural recording application," Biomedical Circuits and Systems Conf. (BioCAS), 2016 IEEE, 212-215.

• B. Sun, Y. Ni, and W. Zhao, "Training-free compressed sensing for wireless neural recording," Biomedical Circuits and Systems Conference (BioCAS), 2016 IEEE, 18-21.

• T. Wu, W. Zhao, H. Guo, H. Lim, and Z. Yang, "A streaming pca based vlsi chip for neural data compression," Biomedical Circuits and Systems Conference (BioCAS), 2016 IEEE, 192-195.

• AT. Nguyen, J. Xu, W. Tam, W. Zhao, T. Wu, Z. Yang, "A programmable fully-integrated microstimulator for neural implants and instrumentation," Biomedical Circuits and Systems Conference (BioCAS), 2016 IEEE, 472-475.

• Z. Yang, J. Xu, AT Nguyen, T. Wu, W. Zhao, W. Tam, "Neuronix enables continuous, simultaneous neural recording and electrical microstimulation," Engineering in Medicine and Biology Society (EMBC), 2016 IEEE 38th Annual International Conference of the, 4451-4454.

• W. Zhao, Y. Ha, and M. Alioto, "Novel self-body-biasing and statistical design for near-threshold circuits with ultra energy-efficient aes as a case study," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23 (8), 1390-1401, 2015.

• W. Zhao, AB. Alvarez, and Y. Ha, "A 65-nm 25.1-ns 30.7-fJ robust subthreshold level shifter with wide conversion range," IEEE Transactions on Circuits and Systems II: Express Briefs 62 (7), 671-675, 2015.

• W. Zhao, Y. Ha, and M. Alioto, "AES architectures for minimum-energy operation and silicon demonstration in 65nm with lowest energy per encryption," Circuits and Systems (ISCAS), 2015 IEEE International Symposium on, 2349-2352.

• AB. Alvarez, W. Zhao, and M. Alioto, "15fJ/b static physically unclonable functions for secure chip identi cation with <2% native bit instability and 140x inter/intra puf hamming distance separation in 65nm," Solid-State Circuits Conference (ISSCC), 2015 IEEE International, 1-3.

• W. Zhao, R. Pan, Y. Ha, and Z. Yang, "A 0.4V 280-nW frequency reference-less nearly all-digital hybrid domain temperature sensor," Asian Solid-State Circuits Conference (ASSCC), 2014 IEEE Asian, 301-304.

• W. Zhao, Y. Ha, C. H. Hoo, and AB. Alvarez, "Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodology," Proc. of the 2013 International Symp. on Low Power Electronics and Design (ISLPED), 323-328.

• W. T. Loke, W. Zhao, and Y. Ha, "Criticality-based routing for fpgas with reverse body bias switch box architectures," Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on, 1-6.

• R. Syed, W. Zhao, Y. Ha, and B. Veeravalli, "A low overhead temperature sensor for self-aware reconfigurable platforms," Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 34.

• W. T. Loke, W. Zhao, and Y. Ha, "A power and cluster-aware technology mapping and clustering scheme for dual-vt fpgas," in 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum. IEEE, 2012, pp. 221-226.