WOVEN is a new venue for discussion, brainstorming, and debate about physical design. The core mission is to bring together a community of practitioners interested in physical design: research, educational, hobbyist, or industrial; open source; architect, designer, engineer, developer; CAD, EDA, algorithms, systems, tools, or frameworks. For more details on the workshop's focus, see the call for papers.
WOVEN will take place Sat June 21 2pm in Room 120-5 at ISCA!
Call for Papers
The primary goal of this workshop is to enable discussion.
We will accept short 2-4 page papers in the 2-column ACM/IEEE format, excluding references and appendices. Submissions will undergo single-blind peer review by a program committee of interdisciplinary experts in the area.
Submissions will be accepted here: https://woven25.compdigitec.com/
The submission deadline is Wed April 30 AoE (anywhere on Earth) -> extended! Mon May 12 AoE (anywhere on Earth)
Our aim is to showcase the submission of early-stage or non-traditional work in a way that will not impede later submission to a mainstream conference. We welcome all of the below:
Early, in-progress research snapshots
Case studies from educational applications of physical design tools
Experience reports on using physical design tools
Essays advocating for or against a general approach
Retrospectives on past efforts
Calls for solutions to open challenges in the area (questions without answers)
Demonstrations of real systems
Overviews of open-source projects, even when the novelty with respect to proprietary alternatives is limited
We welcome participants from a wide variety of backgrounds including but not limited to those in CPU design, FPGA architecture, CGRA, GPUs, IoT/CPS/Embedded Systems, mobile computing, autonomous vehicles, AI/ML/LLM hardware systems, scientific computing, etc. For inspiration, we welcome any computer architects who are interested in any of the following questions:
I want to use physical design tools, but I’ve never used them before. How do I get started?
I want to teach VLSI/architecture: what’s the lowest barrier to entry way to use physical design tools in teaching?
How do I satisfy paper reviewers who are asking for physical implementation/synthesis numbers?
What are simple and/or cost-effective ways to realistically evaluate the feasibility of my architecture?
Workshop Format
The workshop will be held as a half-day format at ISCA 2025.
The workshop will allocate short lightning talk/poster slots (~5-7 minutes) for each submission, following LATTE’s discussion format: “table discussion” where small breakout groups will discuss groups related papers with Q&A to the authors. There will also be a "big picture" discussion section where breakout groups will discuss topics of interest to the community followed by a large group discussion to share thoughts more broadly.
Publication Policy
Materials that have appeared partially or in whole in past or future venues are welcome to encourage participation. We plan to publish the proceedings, although authors can request that their submission not be indexed in case of pre-publication or other concerns.
Organising Committee
Edward Wang is a PhD student at MIT. He led the Hammer project which enabled re-usable physical design flows. His current research interests lie at the intersection of electronic design automation (EDA), formal methods, and compilers/PL.
Dr. Filip Maksimovic is a faculty researcher at Inria-Paris. His research interests include analog, radio frequency, and mixed-signal integrated circuit design. He is also interested in using an developing open-source toolflows for both analog and digital development.
Prof. Jonathan Balkind is a computer architecture professor at UCSB. He led OpenPiton and BYOC, and is an Open Hardware Trailblazer Fellow, NSF CAREER Award winner, and FOSSi Foundation Director. His research interests include open-source hardware research platforms, hardware design languages and tooling, and heterogeneous-ISA systems.