US Patents

P8.              Resolution Splitting for Bit-Stream Processing
                    M. Hassan Najafi, S. Rasoul Faraji, Bingzhe Li, David J. Lilja, and Kia Bazargan 
                    U.S. Patent Application Number: 62/864,798, Type: Provisional, Filing Date: June 2019

P7.              Low-discrepancy Deterministic Bit-stream Processing Using Sobol Sequences
                    M. Hassan Najafi, David J. Lilja, and Marc Riedel
                    U.S. Patent Application Number: 62/864,807, Type: Provisional, Filing Date: June 2019 

P6.              Low-Cost Stochastic Hybrid Multiplier for Quantized Neural Networks
                    Bingzhe Li, M. Hassan Najafi, and David J. Lilja
                    U.S. Patent Application Number: 62/817,343, Type: Provisional, Filing Date: March 2019.

P5.              Sorting Networks using Unary Processing
                    M. Hassan Najafi, David J. Lilja, Marc Riedel, and Kia Bazargan
                    U.S. Patent Application Number: 62/755,906, Type: Provisional, Filing Date: November 2018 

P4.              Stochastic Computing with Analog Memory
                    Karen Khatamifard, M. Hassan Najafi, Ali Ghoreyshi, Ulya Karpuzcu, David J. Lilja
                    U.S. Patent Application Number: 62/735584, Type: Provisional, Filing Date: September 2018    

P3.              High Quality Down-Sampling for Deterministic Bit-Stream Computing [UMN OTC]
                    M. Hassan Najafi and David J. Lilja
                    U.S. Patent Application Number: 16/352,933, Type: Non-Provisional, Filing Date: March 2019   

P2.              Stochastic Computation using Pulse-Width Modulated Signals  [PDF] [Google Patents] [USPTO]
                    M. Hassan Najafi, S Jamali-Zavareh, D. J. Lilja,  M. Riedel, K. Bazargan, and R. Harjani
                    U.S. Patent Application Number: 15/869,453, Type: Non-Provisional, Filing Date: Jan 2018   

P1.              Polysynchronous stochastic circuits [PDF] [Google Patents] [USPTO]
                    David J. Lilja, M. Hassan Najafi, Marc Riedel and Kia Bazargan
                    U.S. Patent Application Number: 15/448,997, Filing Date: Mar 2017
             
Journal Publications

J10.              [TVLSI'19] Performing Stochastic Computation Deterministically [PDF]
                     M. Hassan Najafi, D. Jenson, M. Riedel and D. J. Lilja
                     in IEEE Transaction on Very Large Scale Integration (VLSI) Systems, (to appear) 

J9.                [JETC] Low-Cost Stochastic Hybrid Multiplier for Quantized Neural Networks
                     B. Li, M. Hassan Najafi, D. J. Lilja
                     in ACM Journal on Emerging Technologies in Computing Systems, to appear. 

J8.                [TVLSI'18Low Cost Sorting Network Circuits using Unary Processing [PDF] [Bib]
                     M. Hassan Najafi, D. J. Lilja,  M. Riedel and K. Bazargan
                     in IEEE Transaction on Very Large Scale Integration (VLSI) Systems, April 2018

J7.                [CAL'18On Memory System Design for Stochastic Computing [PDF] [Bib]
                     S. Karen Khatamifard, M. Hassan Najafi, Ali Ghoreyshi, Ulya Karpuzcu, David J. Lilja
                     in IEEE Computer Architecture Letters, July 2018

J6.                [TETC'18High Quality Down-Sampling For Deterministic Approaches to Stochastic Computing [PDF] [Bib]
                     M. Hassan Najafi and David J. Lilja
                     in IEEE Transactions on Emerging Topics in Computing, Jan 2018

J5.                [MICRO'17An Overview of Time-based Computing with Stochastic Constructs [PDF] [Bib]
                     M. Hassan Najafi, S Jamali-Zavareh, D. J. Lilja,  M. Riedel, K. Bazargan, and R. Harjani
                     in IEEE Micro, Nov 2017 

J4.                [TC17Polysynchronous Clocking: Exploiting the Skew Tolerance of Stochastic Circuits [PDF] [Bib] [YouTube: ENZH, ES]
                     M. Hassan Najafi, D. J. Lilja, M. Riedel, and K. Bazargan
                     in IEEE Transaction on Computers, Oct 2017 
                     Selected as IEEE Transaction on Computers' Feature Paper of the Month, Oct 2017  

J3.                [JETC17A Reconfigurable Architecture with Sequential Logic-based Stochastic Computing [PDF] [Bib]
                     M. Hassan Najafi, P. Li, D. J. Lilja, W. Qian, K. Bazargan, M. Riedel
                     in ACM Journal on Emerging Technologies in Computing Systems, June 2017. 

J2.                [TVLSI17Time-Encoded Values for Highly Efficient Stochastic Circuits [PDF] [Bib]
                     M. Hassan Najafi, S Jamali-Zavareh, D. J. Lilja,  M. Riedel, K. Bazargan, and R. Harjani
                     in IEEE Transaction on Very Large Scale Integration (VLSI) Systems, May 2017. 

J1.                [TVLSI16A Fast Fault-Tolerant Architecture for Sauvola Local Image Thresholding Algorithm Using SC [PDF] [Bib]
                     M. Hassan Najafi and M. E. Salehi
                     in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Feb. 2016. 


Conference Presentations

C20               [GLSVLSI19Low Cost Hybrid Spin-CMOS Compressor for Stochastic Neural Networks [PDF]
                     Bingzhe Li, Jiaxi Hu, M.Hassan Najafi, Steven Koester, and David Lilja
                     The 29th ACM Great Lakes Symposium on VLSI (GLSVLSI), Washington, D.C., May 2019 (AR: 29%)

C19               [DAC19SkippyNN: An Embedded Stochastic-Computing Accelerator for Convolutional Neural Networks [PDF][Bib]
                     Reza Hojabr, Kamyar Givaki, SM Reza Tayaranian, Parsa Esfahanian, Ahmad Khonsari, Dara Rahmati, and M. Hassan Najafi
                     The 56th Design Automation Conference (DAC), Las Vegas, NV, June, 2019 (AR: 24.8%)

C18               [ISQED19Accelerating Deterministic Bit-Stream Computing with Resolution Splitting [PDF] [Slide]
                     *M. Hassan Najafi, *S. Rasoul Faraji, Bingzhe Li, David J. Lilja, and Kia Bazargan 
                     (*The first two authors contributed equally)
                     The 20th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, March, 2019

C17               [DATE19Energy-Efficient Convolutional Neural Networks with Deterministic Bit-Stream Processing [PDF] [Slide]
                     *S. Rasoul Faraji, *M. Hassan Najafi, Bingzhe Li, Kia Bazargan, and David J. Lilja 
                     (*The first two authors contributed equally)
                     The 2019 Design, Automation, and Test in Europe (DATE), Florence, Italy, March, 2019 (AR: 24%)

C16              [ICCAD18Deterministic Methods for Stochastic Computing using Low-Discrepancy Sequences [PDF] [Bib[Slide]
                     M. Hassan Najafi, David J. Lilja, and Marc Riedel
                     The 37th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, CA, Nov 2018 (AR: 24.7%)

C15              [IWLS18] Fast-Converging, Scalable, Deterministic Bit-Stream Computing using Low-Discrepancy Sequences [Bib]
                     M. Hassan Najafi, David J. Lilja, and Marc Riedel
                     The 27th International Workshop on Logic & Synthesis (IWLS), San Francisco, CA, USA, Jun 2018

C14               [IWLS18] Using Resolution Splitting to Enhance Performance of Deterministic Bit-Stream Computing
                     *M. Hassan Najafi, *S. Rasoul Faraji, Bingzhe Li, David J. Lilja, and Kia Bazargan 
                     (*The first two authors contributed equally)
                     The 27th International Workshop on Logic & Synthesis (IWLS), San Francisco, CA, USA, Jun 2018

C13              [ISQED18Quantized Neural Networks with New Stochastic Multipliers [Bib]
                     Bingzhe Li, M. Hassan Najafi, Bo Yuan and David J. Lilja
                     The 19th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, Mar 2018

C12              [ICCD17High Quality Down-Sampling For Deterministic Approaches to Stochastic Computing [PDF] 
                     M. Hassan Najafi and David J. Lilja
                     The 35th IEEE International Conference on Computer Design (ICCD), Boston, MA, USA, Nov 2017 (AR: 29%)
                     Best Paper Award, [News], Selected as top ranked paper for publishing in IEEE TETC.

C11              [ICCD17Power and Area Efficient Sorting Networks using Unary Processing [PDF] [Slide] [Bib]
                     M. Hassan Najafi, D. J. Lilja,  M. Riedel, and K. Bazargan
                     The 35th IEEE International Conference on Computer Design (ICCD), Boston, MA, USA, Nov 2017.

C10              [ISCAS17Time-Encoded Values for Highly Efficient Stochastic Circuits [Slide]
                     M. Hassan Najafi, S Jamali-Zavareh, D. J. Lilja,  M. Riedel, K. Bazargan, and R. Harjani
                     The 50th IEEE International Symposium of Circuits and Systems (ISCAS), Baltimore, MD, USA, May 2017

C9                [DAC'17] StochMem: Towards Seamless Stochastic Computing Systems with Analog Memories
                     S. Karen Khatamifard, M. Hassan Najafi, Ali Ghoreyshi, Ulya Karpuzcu, David J. Lilja
                     in 54th Design Automation Conference (DAC) Work-In-Progress, Austin, TX, June 2017

C8                [ASP-DAC17] High-Speed Stochastic Circuits Using Synchronous Analog Pulses [PDF] [Bib] [Slide]
                     M. Hassan Najafi and David J. Lilja
                     2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba, Japan, 2017 (AR: 31%)

C7                [ASP-DAC16Polysynchronous stochastic circuits [PDF] [Bib] [Slide]
                     M. Hassan Najafi, D. J. Lilja, M. Riedel and K. Bazargan
                     2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Macau, 2016 (AR: 34.3%)

C6                [DAC'16] Quantifying the Benefits of Stochastic Computation with Polysynchronous Clocking
                     M. Hassan Najafi, D. J. Lilja, M. Riedel, and K. Bazargan
                     2016 53rd Design Automation Conference (DAC) Work-In-Progress, Austin, TX, June 2016

C5                [FPGA16Using SC to Reduce the Hardware Requirements for a Restricted Boltzmann Machine Classifier[PDF] [Bib]
                     Bingzhe Li, M. Hassan Najafi, and David J. Lilja
                     2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA). ACM, New York, NY, USA

C4                [ICPADS15GPU-Accelerated Nick Local Image Thresholding Algorithm [PDF] [Bib] [Slide] [Codes]
                     M. Hassan Najafi, A. Murali, D. J. Lilja and J. Sartori
                     2015 IEEE 21st International Conference on Parallel and Distributed Systems (ICPADS), Melbourne, VIC, 2015

C3                [ASAP15An FPGA implementation of a Restricted Boltzmann Machine classifier using stochastic bit streams [PDF] [Bib]
                     B. Li, M. Hassan Najafi and D. J. Lilja
                     2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Toronto, ON, 2015

C2                 [ICEE15Using Stochastic Architectures for Edge Detection Algorithms
                     M. Ranjbar, M. Hassan Najafi, and M. E. Salehi
                     2015 23rd Iranian Conference on Electrical Engineering (ICEE), Jun 2015.

C1                 [ICEE13Exploring the design space for area-efficient embedded VLIW packet processing engine [PDF] [Bib] [Poster]
                     M. Hassan. Najafi and M. E. Salehi, “
                     2013 21rd Iranian Conference on Electrical Engineering (ICEE), Jun 2013

Thesis

[PhD] M. Hassan Najafi, New Views for Stochastic Computing: From Time-Encoding to Deterministic Processing[PDF] [Slides]
          University of Minnesota-Twin Cities, USA, July 2018.
          Accepted for DAC 2019 PhD Forum          
          Accepted for DATE 2019 PhD Forum
          Accepted for ASP-DAC 2019 Student Research Forum
          Selected to receive the 2018 EDAA Outstanding Dissertation Award in the area of "New Directions in Logic, Physical Design and CAD for           Analog/Mixed-signal, Nano-Scale and Emerging Technologies" from the European Design and Automation Association (EDAA)

[Master] M. Hassan Najafi, 
Exploiting Stochastic Computing for Error Resilient Processors
              University of Tehran, Iran, June 2014.

[Bachelor] M. Hassan Najafi, Evaluation of image Thresholding algorithms
                 University of Isfahan, Iran, 2011.