Ding-Yong Hong
Postdoctoral Research Fellow
Computer System Laboratory
Institute of Information Science, Academia Sinica +886.2.2788.3799 ext.1662
128 Academia Road, Section 2, Nankang, Taipei 115, Taiwan dyhong@iis.sinica.edu.tw
Education

Ph.D.Computer Science, National Tsing Hua University, Taiwan2013
M.S.Computer Science, National Tsing Hua University, Taiwan2005
B.S.Computer Science, National Tsing Hua University, Taiwan2004
Honors & Awards

  1. Best Paper Award, the 22nd International Conference on Parallel and Distributed Systems (ICPADS), Wuhan, China (2016)
Work Experience

  1. Postdoctoral Research Fellow & Senior Software Engineer, June 2014 — Present
    Academia Sinica, Taipei, Taiwan
    Researched on dynamic optimization for the QEMU/Android full-system emulator. The research aims to improve the performance of memory virtualization with hardware-assisted techniques and para-virtualization.
  2. Research Assistant, July 2010 — June 2013
    Academia Sinica, Taipei, Taiwan
    Researched on dynamic binary translation/optimization techniques. The goal is to design an efficient and retargetable dynamic binary translator that translates guest applications from several ISAs and retargets them to host machines with different ISAs. A framework is designed by integrating QEMU and LLVM, which supports the x86, ARM and PowerPC ISAs. It also leverages multicores and hardware performance counters to optimize the binary translation.
  3. Research Intern, June 2007 — September 2007
    IBM Watson Research Center, Yorktown Heights, NY
    Designed a test automation framework for IBM HPC Toolkit (HPCT). Also researched and worked on application level I/O tracing toolkit on AIX and Linux cluster servers, and Blue Gene supercomputers.
  4. Teaching Assistant, September 2005 — January 2006
    National Tsing Hua University, Taiwan
    Taught parallel programming with MPI, Pthread, OpenMP and Hadoop.
Publications

Journal Papers
  1. Optimizing Control Transfer and Memory Virtualization in Full System Emulators
    Ding-Yong Hong, Chun-Chen Hsu, Cheng-Yi Chou, Wei-Chung Hsu, Pangfeng Liu and Jan-Jan Wu
    ACM Transactions on Architecture and Code Optimization (TACO), volume 12, issue 4, No. 47. December 2015.
  2. A Dynamic Binary Translation System in a Client/Server Environment
    Chun-Chen Hsu, Ding-Yong Hong, Wei-Chung Hsu, Pangfeng Liu and Jan-Jan Wu
    Journal of Systems Architecture (JSA), volume 61, issue 7, pages 307-319. August 2015.
  3. Efficient and Retargetable Dynamic Binary Translation on Multicores
    Ding-Yong Hong, Jan-Jan Wu, Pen-Chung Yew, Wei-Chung Hsu, Chun-Chen Hsu, Pangfeng Liu, Chien-Min Wang and Yeh-Ching Chung
    IEEE Transactions on Parallel and Distributed Systems (TPDS), volume 25, issue 3, pages 622-632. March 2014.
Refereed Conference Papers
  1. Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions
    Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu and Wei-Chung Hsu
    to appear in ACM Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES).
  2. Exploiting Longer SIMD Lanes in Dynamic Binary Translation
    Ding-Yong Hong, Sheng-Yu Fu, Yu-Ping Liu, Jan-Jan Wu and Wei-Chung Hsu
    IEEE International Conference on Parallel and Distributed Systems (ICPADS). Wuhan, China. December 2016. Best Paper Award (out of 412 submissions)
  3. Optimizing Control Transfer and Memory Virtualization in Full System Emulators
    Ding-Yong Hong, Chun-Chen Hsu, Cheng-Yi Chou, Wei-Chung Hsu, Pangfeng Liu and Jan-Jan Wu
    Internationl Conference on High-Performance and Embedded Architecture and Compiler (HiPEAC). Prague, Czech Republic. January 2016.
  4. SIMD Code Translation in an Enhanced HQEMU
    Sheng-Yu Fu, Ding-Yong Hong, Jan-Jan Wu, Pangfeng Liu and Wei-Chung Hsu
    IEEE International Conference on Parallel and Distributed Systems (ICPADS). Melbourne, Australia. December 2015.
  5. DBILL: An Efficient and Retargetable Dynamic Binary Instrumentation Framework using LLVM Backend
    Yi-Hong Lyu, Ding-Yong Hong, Tai-Yi Wu, Jan-Jan Wu, Wei-Chung Hsu, Pangfeng Liu and Pen-Chung Yew
    ACM International Conference on Virtual Execution Environments (VEE). Salt Lake City, Utah, USA. March 2014.
  6. Improving Dynamic Binary Optimization Through Early-Exit Guided Code Region Formation
    Chun-Chen Hsu, Pangfeng Liu, Jan-Jan Wu, Pen-Chung Yew, Ding-Yong Hong, Wei-Chung Hsu and Chien-Min Wang
    ACM International Conference on Virtual Execution Environments (VEE). Houston, Texas, USA. March 2013.
  7. Improving Region Selection Through Early-Exit Detection
    Chun-Chen Hsu, Pangfeng Liu, Jan-Jan Wu, Pen-Chung Yew, Ding-Yong Hong, Wei-Chung Hsu and Chien-Min Wang
    Asia-Pacific Programming Languages and Compilers Workshop (APPLC). Beijing, China. June 2012.
  8. HQEMU: A Multi-Threaded and Retargetable Dynamic Binary Translator on Multicores [slides] [demo]
    Ding-Yong Hong, Chun-Chen Hsu, Pen-Chung Yew, Jan-Jan Wu, Wei-Chung Hsu, Yeh-Ching Chung, Pangfeng Liu and Chien-Min Wang
    IEEE/ACM International Symposium on Code Generation and Optimization (CGO). San Jose, California, USA. March 2012.
  9. LnQ: Building High Performance Dynamic Binary Translators with Existing Compiler Backends
    Chun-Chen Hsu, Pangfeng Liu, Chien-Min Wang, Jan-Jan Wu, Ding-Yong Hong, Pen-Chung Yew and Wei-Chung Hsu
    International Conference on Parallel Processing (ICPP). Taipei, Taiwan. September 2011.
  10. A Scalable HLA RTI System Based on Multiple-FedServ Architecture
    Ding-Yong Hong, Fang-Ping Pai, Shih-Hsiang Lo and Yeh-Ching Chung
    International Conference on Computer Modelling and Simulation (UKSim). Cambridge, UK. March 2010.
  11. MGRID: A Modifiable-Grid Region Matching Approach for DDM in the HLA RTI
    Shih-Hsiang Lo, Cheng-An Chiu, Fang-Ping Pai, Ding-Yong Hong and Yeh-Ching Chung
    Spring Simulation Multiconference (SpringSim). San Diego, California, USA. March 2009.
  12. Early Experiences in Application Level I/O Tracing on Blue Gene Systems
    Seetharami Seelam, I-Hsin Chung, Ding-Yong Hong, Hui-Fang Wen and Hao Yu
    IEEE International Parallel and Distributed Processing Symposium (IPDPS). Miami, Florida, USA. April 2008.
  13. An Efficient MPI-IO for Noncontiguous Data Access over InfiniBand
    Ding-Yong Hong, Ching-Wen You and Yeh-Ching Chung
    International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN). Las Vegas, Nevada, USA. December 2005.
Technical Reports
Projects

  1. Optimizations for Full System Emulation, June 2014 — Present
    Designed techniques to improve SoftMMU/SoftTLB performance in DBT. The approaches include exploiting the concept of process-context identifier (PCID), and information from guest OS with para-virtualization.
  2. Distributed DBT System Based on a Client/Server Model, June 2012 — June 2013
    Developed a two-translator distributed DBT platform. It off-loads the CPU-intensive optimizations of the ARM-based clients to the powerful x86 servers, and achieves both low overhead and high performance translation.
  3. HQEMU: An Efficient and Retargetable Dynamic Binary Translator on Multicores, Auguest 2010 — June 2013
    Developed HQEMU, which uses QEMU and the LLVM compiler backend as its building block. It is enhanced with advanced trace optimization and runtime optimization techniques. Experiment results with the PARSEC multi-threaded benchmarks demonstrate that HQEMU improves QEMU performance by more than 25X with 32 threads.
  4. Distributed Interactive Simulation Framework, June 2006 — March 2010
    Implemented entire IEEE Standard 1516—the HLA distributed simulation framework. Its communication protocol is optimized by applying the MPI communication model, producing a scalable and lightweight distributed simulation.
  5. Parallel I/O and Parallel Filesystem, September 2004 — June 2008
    Redistribution of noncontiguous data elements causes the inefficiency of MPI collective I/O. This project exploited the Infiniband RDMA gather/scatter functionality to eliminate the overhead while performing data redistribution.
  6. Print Master Server, September 2004 — June 2006
    Designed a printer monitoring product for Epson Taiwan. Developed the software components on x86, ARM and PowerPC embedded platforms which include GUI design, print tracking/charging system, SNMP printer monitoring tools and the integration of smart cards.