Taiwan 3DS-IC Committee

  • The International Standards Committee (ISC) approved a petition for the formation of the Taiwan 3DS-IC Standards Technical Committee at SEMICON West 2011
  • Approved task forces:
    • 3DS-IC Testing Task Force
    • 3DS-IC Middle End Process

Testing TF
  • Formed on October 26, 2011
  • Charter:
    • The Testing Task Force will develop standards, guidelines, and/or specifications for electrical testing related activities used in 3DS-IC manufacturing for the ultimate goal of yield enhancement.
  • Scope:
    • Activities related to electrical testing of prebond and bonded wafers/devices include (but not limited to):
    • Design for Test (DfT) such as test structures and placement;
    • Test methodologies such as contact method and test procedures;
    • Test fixtures such as probe card and probe interfaces, and
    • Data mining test results.

Middle End Process TF
  • Formed on February 9, 2012
  • Charter:
    • Develop the standards and define the specifications for middle-end process (MEOL) related manufacturing flow. Current Phase of Standard and Specification development focused on the middle-end process on wafers with or without TSVs,  including post final metal temporary bonding, wafer thinning, TSV formation  and reveal, micro-bumping, redistributed line (RDL) formation  and carrier de-bond.
  • Scope:
    • Identify and suggest generic process flow for middle-end process.
    • Develop criteria for micro-bump dimensions, planarization and related.  Dimensions can be determined into wafer-to-wafer level (WWL), die-to-wafer level (DWL), and die-to-die level (DDL).
    • Develop criteria for TSV CMP process and related.  The via size, via surface roughness, post CMP Cu step height, and post CMP Cu bump planarization uniformity are a few of the related planarization criteria that will be critical to the micro bumping yield and inspection standard.
    • Develop standard for photo alignment mark and overlay mark. Alignment marks for patterning TSVs and stacking devices/wafers would be standardized for recognition.
    • Suggest wafer or die thickness variation and warpage before and after MEOL and identify thickness variation, void size, overall void percentage of temporary bonding glue layer, warpage control after temporary bonding and corresponding measure method.
    • Develop TSV quality criteria such as thickness uniformity, TSV depth variation, void, pattern density, TSV metal extrusion.
    • Research on in-process testing.

SEMI Staff Contact:
  • Cher Wu (cwu@semi.org)
Paul Trio,
Aug 4, 2011, 2:56 PM