Publications

  • K. Karda, S. Sutar, J. Brockman, J. Nahas and A. Seabaugh, "Bistable-Body Tunnel SRAM," IEEE Transactions on Nanotechnology (Accepted for Publication), 2010.

  • J. Kuczenski, J. Enszer, M. McCready and J. Brockman, "Student electronic portfolios for professional development using google apps," in ASEE Annual Conference and Exposition, Louisville, KY, 2010, .

  • S. Li, S. Kuntz, P. Kogge and J. Brockman, "Lightweight Chip Multi-Threading (LCMT): Maximizing Fine-Grained Parallelism On-Chip," IEEE Transactions on Parallel and Distributed Systems (Accepted for Publication), 2010.

  • J. Brockman, L. Brown and M. McDonald, "IntroEngineering.org: A structured wiki community for instructors of first-year engineering courses," in ASEE Annual Conference and Exposition, Austin, TX, 2009, .

  • P. Bui and J. Brockman, "Performance analysis of accelerated image registration using GPGPU," in GPGPU-2: Proceedings of 2nd Workshop on General Purpose Processing on Graphics Processing Units, Washington, D.C., 2009, pp. 38-45.

  • K. Karda, J. Brockman, S. Sutar, A. Seabaugh and J. Nahas, "One-transistor bistable-body tunnel SRAM," in 2009 IEEE International Conference on IC Design and Technology (ICICDT), 2009, pp. 233-6.

  • J. Kuczenski, J. Enszer, M. McCready, J. Brockman, X. Duan and P. Turner, "Personalized development and electronic portfolio project," in AIChE Annual Meeting, Nashville, TN, 2009, .

  • S. Kurtz, J. Brockman and R. Bualuan, "Project G2: Circuit design in the undergraduate classroom," in ASEE Annual Conference and Exposition, Austin, TX, 2009, .

  • S. Li, J. H. Ahn, R. D. Strong, J. B. Brockman, D. M. Tullsen and N. P. Jouppi, "McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures," in 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2009), 2009, pp. 469-80.

  • J. Brockman, Introduction to Engineering: Modeling and Problem Solving. Hoboken, NJ: John Wiley & Sons, 2008.

  • J. Brockman, S. Li, P. Kogge, A. Kashyap and M. Mojarradi, "Design of a mask-programmable memory/multiplier array using G4-FET technology," in 2008 45th ACM/IEEE Design Automation Conference, 2008, pp. 337-8.

  • S. Li, S. Kuntz, P. Kogge and J. Brockman, "Memory model effects on application performance for a lightweight multithreaded architecture," in 2008 IEEE International Parallel & Distributed Processing Symposium, 2008, pp. 2347-54.

  • S. Thoziyoor, J. H. Ahn, M. Monchiero, J. B. Brockman and N. P. Jouppi, "A comprehensive memory modeling tool and its application to the design and analysis of future memory hierarchies," in 35th International Symposium on Computer Architecture, 2008, pp. 51-62.

  • J. Brockman, D. Rinzler, P. Bui and F. Ianarilli, "FPGA-based acceleration of an image registration algorithm," in High-Performance Embedded Computing Workshop, MIT Lincoln Lab, Lexington, MA, 2007, .

  • S. Li, A. Kashyap, S. Kuntz, J. Brockman, P. Kogge, P. Springer and G. Block, "A heterogeneous lightweight multithreaded architecture," in 2007 IEEE International Parallel and Distributed Processing Symposium, 2007, pp. 8.

  • P. M. Kogge and J. B. Brockman, "Redundancy in multi-core memory-rich application-specific PIM chips," in 2006 International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, 2006, pp. 8.

  • G. Snider, G. H. Bernstein and J. Brockman, "Work in progress - multidisciplinary experience in system-on-chip development," in 35th Annual Frontiers in Education, 2005, pp. 1-32.

  • S. Thoziyoor, J. Brockman and D. Rinzler, "PIM lite: A multithreaded processor-in-memory prototype," in GLSVLSI '05: Proceedings of the 15th ACM Great Lakes Symposium on VLSI, Chicago, Illinois, USA, 2005, pp. 64-69.

  • A. -. Barabasi, M. A. de Menezes, S. Balensiefer and J. Brockman, "Hot spots and universality in network dynamics," European Physical Journal B, vol. 38, pp. 169-75, 03, 2004.

  • J. B. Brockman, S. Thoziyoor, S. K. Kuntz and P. M. Kogge, "A low cost, multithreaded processing-in-memory system," in WMPI '04: Proceedings of the 3rd Workshop on Memory Performance Issues, Munich, Germany, 2004, pp. 16-22.

  • E. Upchurch, T. Sterling and J. Brockman, "Analysis and modeling of advanced PIM architecture design tradeoffs," in Supercomputing, 2004. Proceedings of the ACM/IEEE SC2004 Conference, 2004, pp. 12-12.

  • K. Yoshida, J. Brockman, D. Costello, T. Fuja and M. Tanner, "VLSI implementation of quasi-cyclic LDPC codes," in International Symposium on Information Theory and its Applications, Parma, Italy, 2004, .

  • G. H. Bernstein, J. B. Brockman, P. M. Kogge, G. L. Snider and B. E. Walvoord, "From bits to chips: A multidisciplinary curriculum for microelectronics system design education," in Microelectronic Systems Education Conference, 2003, pp. 95-7.

  • J. Butler and J. Brockman, "Web-based learning tools on microprocessor fundamentals for a first-year engineering course," in ASEE Annual Conference and Exposition, 2003, .

  • A. Rodrigues, R. Murphy, P. Kogge, J. Brockman, R. Brightwell and K. Underwood, "Implications of a PIM architectural model for MPI," in IEEE International Conference on Cluster Computing, 2003, pp. 259-68.

  • E. Upchurch, T. Sterling and J. B. Brockman, "Analysis and modeling of advanced PIM architecture design tradeoffs," in Innovative Architecture for Future Generation High-Performance Processors and Systems, 2003, pp. 66-75.

  • J. B. Brockman, T. E. Fuja and S. M. Batill, "A multidisciplinary course sequence for first-year engineering students," in ASEE Annual Conference, Montreal, Canada, 2002, .

  • A. -. Barabasi, V. W. Freeh, H. Jeong and J. B. Brockman, "Parasitic computing," Nature, vol. 412, pp. 894-7, 08/30, 2001.

  • J. B. Brockman, B. Hanounik and P. M. Kogge, "An 0.25 micron transposable memory," in High-Performance Embedded Computing Symposium, MIT Lincoln Laboratories, Lexington, MA, 2001, .

  • J. E. Butler and J. B. Brockman, "A Web-based learning tool that simulates a simple computer architecture," SIGCSE Bulletin, vol. 33, pp. 47-50, 06, 2001.

  • J. E. Butler and J. B. Brockman, "A web-based learning tool that simulates a simple computer architecture," SIGCSE Bull, vol. 33, pp. 47-50, 2001.

  • L. V. Yerosheva, S. K. Kuntz, J. B. Brockman and P. M. Kogge, "A microserver view of HTMT," in Proceedings of IEEE International Symposium on Parallel and Distributed Processing, 2001, pp. 10.

  • J. B. Brockman, P. M. Kogge, V. Freeh and T. Sterling, "Microservers: A new memory semantics for massively parallel computing," in Int. Conf. on Supercomputing, Rhodes, Greece, 1999, pp. 454-463.

  • M. Hall, P. Kogge, J. Koller, P. Diniz, J. Chame, J. Draper, J. LaCoss, J. Granacki, J. Brockman, A. Srivastava, W. Athas, V. Freeh, J. Shin and J. Park, "Mapping irregular applications to DIVA, a PIM-based data-intensive architecture," in Supercomputing '99: Proceedings of the 1999 ACM/IEEE Conference on Supercomputing (CDROM), Portland, Oregon, United States, 1999, pp. 57.

  • A. N. Lokanathan and J. B. Brockman, "A methodology for concurrent process-circuit optimization," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 18, pp. 889-902, 1999.

  • E. W. Johnson and J. B. Brockman, "Measurement and analysis of sequential design processes," ACM Transactions on Design Automation of Electronic Systems, vol. 3, pp. 1-20, 1998.

  • P. Kogge, J. Brockman and V. Freeh, "Processing-in-memory based systems: Performance evaluation considerations," in Workshop on Performance Analysis and its Impact on Design, PAID'98, Held in Conjunction with the International Symposium on Computer Architecture, Barcelona, Spain, 1998, .

  • A. Lokanathan and J. Brockman, "Process multi-circuit optimization," in Proceedings of the 35th IEEE/ACM Design Automation Conference, San Francisco, CA, 1998, pp. 382-387.

  • B. Wujek, E. Johnson, J. Renaud, J. Brockman and S. Batill, "Design flow management and multidisciplinary design optimization in application to aircraft concept sizing," in Integrated Product and Process Development: Methods, Tools, and Technologies, J. Usher, H. Parsaei and U. Roy, Eds. John Wiley & Sons, 1998, pp. 355-376.

  • J. Zawodny, J. Brockman, P. Kogge and E. Johnson, "Cache-in-memory: A lower power alternative," in Workshop on Power-Driven Microarchitecture, Held in Conjunction with the International Symposium on Computer Architecture, Barcelona, Spain, 1998, .

  • P. Kogge, J. Brockman, T. Sterling and G. Gao, "Processing-in-memory: Chips to petaflops," in IRAM Workshop, Int. Symposium on Computer Architecture, 1997, .

  • A. Lokanathan, S. Swiderski, J. Brockman and J. Nahas, "SPACE: A tool for efficient statistical worst case SPICE simulation of circuits," in Motorola Corporate Engineering Council Simulation and Modeling Symposium, 1997, .

  • J. Brockman, S. Batill, J. Kantor, J. Renaud, D. Kirkner and R. Stevenson, "Development of an undergraduate multidisciplinary design laboratory," in Proceedings of the 1996 ASEE Annual Conference, Washington, D.C., 1996, .

  • J. B. Brockman, "Evaluation of student design processes," in Technology-Based Re-Engineering Engineering Education Proceedings of Frontiers in Education FIE'96 26th Annual Conference, Salt Lake City, UT, USA, 1996, pp. xl+1517, 189-93.

  • E. W. Johnson and J. Brockman, "Reducing overall design time through efficient allocation of individual task times," in Papers-American Institute of Aeronautics, 1996, pp. 1516-1523.

  • E. W. Johnson and J. B. Brockman, "Towards a model for electronic design process refinement," Computers in Industry, vol. 30, pp. 27-36, 1996.

  • E. W. Johnson, J. B. Brockman and R. Vigeland, "Sensitivity analysis of iterative design processes," in Proceedings of International Conference on Computer Aided Design, San Jose, CA, USA, 1996, pp. xxv+697, 142-5.

  • E. W. Johnson, L. A. Castillo and J. B. Brockman, "Application of a markov model to the measurement, simulation, and diagnosis of an iterative design process," in Proceedings of 33rd Design Automation Conference, Las Vegas, NV, USA, 1996, pp. xxx+839, 185-8.

  • P. M. Kogge, S. C. Bass, J. B. Brockman, D. Z. Chen and E. Sha, "Pursuing a petaflop: Point designs for 100 TF computers using PIM technologies," in Proceedings of 6th Symposium on the Frontiers of Massively Parallel Computation (Frontiers '96), Annapolis, MD, USA, 1996, pp. xiv+372, 88-97.

  • A. N. Lokanathan and J. B. Brockman, "Concurrent design of manufacturable integrated circuits,”," in Papers- American Institute of Aeronautics and Astronautics 1996, 1996, pp. 1010-1018.

  • A. N. Lokanathan, J. B. Brockman and J. E. Renaud, "A methodology for concurrent fabrication process/cell library optimization," in Proceedings of 33rd Design Automation Conference, Las Vegas, NV, USA, 1996, pp. xxx+839, 825-30.

  • B. A. Wujek, E. W. Johnson, J. E. Renaud and J. B. Brockman, "Design flow management and multidisciplinary design optimization in application to aircraft concept sizing," in Proceedings of 34th AIAA Aerospace Sciences Meeting and Exhibit, 1996, .

  • B. A. Wujek, J. E. Renaud, S. M. Batill and J. B. Brockman, "Concurrent subspace optimization using design variable sharing in a distributed computing environment," Concurrent Engineering: Research and Applications, vol. 4, pp. 361-77, 1996.

  • S. Yoder and J. Brockman, "A software architecture for collaborative development and solution of MDO problems," in Papers-American Institute of Aeronautics and Astronautics, 1996, pp. 1060-1062.

  • J. B. Brockman and S. W. Director, "The schema-based approach to workflow management," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, pp. 1257-67, 1995.

  • E. W. Johnson and J. B. Brockman, "Incorporating design schedule management into a flow management system," in Proceedings of 32nd Design Automation Conference, San Francisco, CA, USA, 1995, pp. xxiv+733, 82-7.

  • A. Lokanathan, J. Brockman and J. Renaud, "A multidisciplinary approach to integrated circuit design," in Proceedings of the 2nd Concurrent Engineering Conference, 1995, pp. 121-121-130.

  • A. N. Lokanathan and J. B. Brockman, "Efficient worst case analysis of integrated circuits," in Proceedings of the IEEE 1995 Custom Integrated Circuits Conference, Santa Clara, CA, USA, 1995, pp. 662, 237-40.

  • X. Niu and J. B. Brockman, "A bayesian approach to variable screening for modeling the IC fabrication process," in Proceedings of ISCAS'95 - International Symposium on Circuits and Systems, Seattle, WA, USA, 1995, pp. l+2346, 1227-30.

  • B. A. Wujek, J. E. Renaud, S. M. Batill and J. B. Brockman, "Concurrent subspace optimization using design variable sharing in a distributed computing environment," in ASME Design Engineering Technical Conferences 1995: Advances in Design Automation, 1995, .

  • J. Brockman, "Use of DeBartolo multimedia facilities in teaching computer science and engineering classes," in Changing the Process of Teaching and Learning: Essays by Notre Dame FacultyAnonymous University of Notre Dame, 1994, pp. 16-19.

  • J. B. Brockman and S. W. Director, "A simulation-based approach to parametric performance test development," in Statistical Approach to VLSI, Advances in CAD for VLSIAnonymous North-Holland, Elsevier Science, 1994, pp. 293-328.

  • P. R. Sutton, J. B. Brockman and S. W. Director, "Design management using dynamically defined flows," in Proceedings of DAC '93: 30th ACM/IEEE-CS Design Automation Conference, Dallas, TX, USA, 1993, pp. xxvii+768, 648-53.

  • J. Brockman, M. Anderson, S. Director and P. Feldman, "Efficient management of integrated circuit and fabrication process optimization tasks," in Proceedings of IEEE Asia-Pacific Conference on Circuits and Systems, 1992, .

  • J. B. Brockman and S. W. Director, "A schema-based approach to CAD task management," in Electronic Design Automation Frameworks. Third IFIP WG10.2/ WG10.5 Workshop, Bad Lippspringe, Germany, 1992, pp. 71-84.

  • J. B. Brockman and S. W. Director, "The hercules CAD task management system," in Proceedings of IEEE International Conference on Computer-Aided Design (ICCAD-91), 1991, pp. 254.

  • J. B. Brockman and S. W. Director, "A macromodeling approach to process simulator tuning," in Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits: NUPAD III, 1990, pp. 17-18.

  • J. B. Brockman and S. W. Director, "Predictive subset testing: optimizing IC parametric performance testing for quality, cost, and yield," IEEE Transactions on Semiconductor Manufacturing, vol. 2, pp. 104-13, 1989.

  • J. B. Brockman and S. W. Director, "Predictive subset testing for IC performance," in Proceedings of IEEE International Conference on Computer-Aided Design (ICCAD-88), 1988, pp. 336.